參數(shù)資料
型號: WM2633IDT
廠商: Wolfson Microelectronics
英文描述: 9V BLK BOX (4.876X6.876X2.0)
中文描述: 字節(jié)寬并行輸入,12位電壓輸出DAC,帶有內(nèi)部參考
文件頁數(shù): 1/12頁
文件大?。?/td> 389K
代理商: WM2633IDT
WM2633
Byte-wide Parallel Input, 12-bit Voltage Output DAC
with Internal Reference
Production Data, July 1999, Rev 1.0
WOLFSON MICROELECTRONICS LTD
Lutton Court, Bernard Terrace, Edinburgh, EH8 9NX, UK
Tel: +44 (0) 131 667 9386
Fax: +44 (0) 131 667 5176
Email: sales@wolfson.co.uk
http://www.wolfson.co.uk
Production Data
contain final specifications
current on publication date. Supply of
products conforms to Wolfson
Microelectronics’ Terms and conditions.
masterrev1.0.doc 07/15/99 3:52
1999 Wolfson Microelectronics Ltd
.
FEATURES
12-bit voltage output DAC
Dual supply 2.7V to 5.5V operation
DNL
±
0.3 LSBs, INL
±
1.2 LSBs
Internal programmable voltage reference
Programmable settling time
8-bit micro controller compatible interface
Power down mode (10nA)
APPLICATIONS
Battery powered test instruments
Digital offset and gain adjustment
Battery operated/remote industrial controls
Machine and motion control devices
Wireless telephone and communication systems
Speech synthesis
Arbitrary waveform generation
ORDERING INFORMATION
DEVICE
TEMP. RANGE
PACKAGE
WM2633CDT
0
°
to 70
°
C
-40
°
to 85
°
C
20-pin TSSOP
WM2633IDT
20-pin TSSOP
DESCRIPTION
The WM2633 is a 12-bit voltage output, resistor string, digital-
to-analogue converter. A hardware controlled power down mode
is provided that reduces current consumption to 10nA. The
WM2633 features an internal programmable voltage reference
simplifying overall system design. A reference voltage may also
be supplied externally.
The device has an 8-bit microcontroller compatible parallel
interface. The eight data LSBs, the four data MSBs, and the five
control bits are written using three different addresses.
Excellent performance is delivered with a typical DNL of 0.3
LSBs and a typical INL of 1.2 LSBs. The output stage is
buffered by a x2 gain near rail-to-rail amplifier, which features a
Class A output stage (slow mode, Class AB). The settling time
of the DAC is software or pin programmable to allow the
designer to optimise speed versus power dissipation.
The device is available in a 20-pin TSSOP package.
Commercial
temperature
(0°
temperature (-40° to 85°C) variants are supported.
to
70°C)
and
Industrial
BLOCK DIAGRAM
TYPICAL PERFORMANCE
(13) OUT
D[0-7]
(19,20, 1-6)
3-BIT
CONTROL
LATCH
REF(12)
POWER-ON
RESET
NWE (17)
(14)
GND
REFERENCE
INPUT BUFFER
WM2633
DAC
OUTPUT
BUFFER
NCS (18)
A[0-1] (8, 7)
4-BIT DAC
MSW
HOLDING
LATCH
8-BIT DAC
LSW
HOLDING
LATCH
X1
POWERDOWN/
SPEED
CONTROL
X2
(16)
NLDAC
PARALLEL
INTERFACE
AND
CONTROL
LOGIC
SPD (9)
NPD (15)
12-BIT DAC
LATCH
DVDD
(10)
AVDD
(11)
2-BIT
REFERENCE
SELECT
LATCH
1.024V/2.048V
SELECTABLE
REFERENCE
X1
REFERENCE
OUTPUT BUFFER
WITH OUPUT
ENABLE
AVDD = DVDD 5V, V
REF
= External. 2.048V, Speed = Fast mode, Load = 10k/100pF
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
0
512
1024
1536
2048
2559
3071
3583
4095
DIGITAL CODE
D
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