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參數(shù)資料
| 型號： | WM2633CDT |
| 廠商： | Wolfson Microelectronics |
| 英文描述： | Byte-wide Parallel Input, 12-bit Voltage Output DAC with Internal Reference |
| 中文描述： | 字節(jié)寬并行輸入，12位電壓輸出DAC，帶有內(nèi)部參考 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 389K |
| 代理商： | WM2633CDT |
WM2633
Production Data
WOLFSON MICROELECTRONICS LTD
PD Rev 1.0 July 1999
8
DEVICE DESCRIPTION
GENERAL FUNCTION
The device uses a resistor string network buffered with an op amp to convert 12-bit digital data to
analogue voltage levels (see Block Diagram). The output voltage is determined by the reference
input voltage and the input code according to the following relationship:
Output voltage =
(
)
4096
CODE
V
2
REF
INPUT
1111
OUTPUT
)
1111
1111
(
4096
4095
V
2
REF
:
:
)
1000
0000
0001
(
4096
2049
V
2
REF
1000
0000
0000
(
)
REF
REF
V
4096
)
2048
V
2
=
0111
1111
1111
(
4096
2047
V
2
REF
:
:
)
0000
0000
0001
(
4096
1
V
2
REF
0000
0000
0000
0V
Table 1 Binary Code Table (0V to 2V
REF
Output), Gain = 2
POWER ON RESET
An internal power-on-reset circuit resets the DAC register to all 0s on power-up.
BUFFER AMPLIFIER
The output buffer has a near rail-to-rail output with short circuit protection and can reliably drive a
2k
load with a 100pF load capacitance.
EXTERNAL REFERENCE
If an external reference is selected, the reference voltage input is buffered which makes the DAC
input resistance independent of code. The REF pin has an input resistance of 10M
and an input
capacitance of typically 55pF. The reference voltage determines the DAC full-scale output.
HARDWARE CONFIGURATION OPTIONS
The device has three configuration options that are controlled by device pins.
DEVICE POWER DOWN
The device can be powered-down by pulling pin NPD (pin 15) high. This powers down the DAC. This
will reduce power consumption significantly. The NPD pin low overrides the software control bit
PWR. When the power down function is released the device reverts to the DAC code set prior to
power down.
SETTLING TIME
The settling time of the device can be controlled by pin SPD (pin 9). A ONE on pin SPD will ensure a
FAST settling time; a ZERO will ensure a SLOW settling time. The SPD pin high overrides the
software control bit SPD.
SIMULTANEOUS DAC UPDATE
The NLDAC pin (Pin 16) can be held high to prevent word writes from updating the DAC latch. By
writing the new value to the DAC then pulling NLDAC low, the new DAC code is loaded into the DAC
latch.
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| WM2636CD | 12-bit Serial Input Voltage Output DAC with Internal Reference |
| WM2636ID | 12-bit Serial Input Voltage Output DAC with Internal Reference |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| WM2633IDT | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Byte-wide Parallel Input, 12-bit Voltage Output DAC with Internal Reference |
| WM2636 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:12-bit Serial Input Voltage Output DAC with Internal Reference |
| WM2636CD | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:12-bit Serial Input Voltage Output DAC with Internal Reference |
| WM2636ID | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:12-bit Serial Input Voltage Output DAC with Internal Reference |
| WM2637 | 制造商:WOLFSON 制造商全稱:WOLFSON 功能描述:Dual 10-Bit Serial Input Voltage Output DAC with Internal Reference |
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