參數(shù)資料
型號: WLA49VVA
廠商: National Semiconductor Corporation
元件分類: ADC
英文描述: Audio Sub-System with Dual-Mode Stereo Headphone and Mono High Efficiency Loudspeaker Amplifiers and Multi-Purpose ADC
中文描述: 音頻子系統(tǒng)的雙模單聲道立體聲耳機(jī)和揚(yáng)聲器放大器的高效率和多功能模數(shù)轉(zhuǎn)換器
文件頁數(shù): 30/112頁
文件大小: 5017K
代理商: WLA49VVA
12.0 Status & Control Registers (Continued)
12.4 COMMON CLOCK SETTINGS FOR THE DAC & ADC
The DAC has an over sampling rate of 125 but requires a 250*fs clock at point B. This allows a simple clocking solution as it will
work from 12.000 MHz (common in most systems with Bluetooth or USB) at 48 kHz exactly, the following table describes the clock
required at point B for various clock sample rates in the different DAC modes:
TABLE 4. Common DAC Clock Frequencies
DAC Sample Rate (kHz)
Clock Required at B (MHz)
82
11.025
2.75625
12
3
16
4
22.05
5.5125
24
6
32
8
44.1
11.025
48
12
The ADC has an over sampling ratio of 125 so the table below shows the required clock frequency at point C.
TABLE 5. Common ADC Clock Frequencies
ADC Sample Rate (kHz)
Clock Required at C (MHz)
81
11.025
1.378125
12
1.5
16
2
22.05
2.75625
24
3
Methods for producing these clock frequencies are described in the PLL Section.
LM4935
www.national.com
24
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