參數(shù)資料
型號(hào)： WJLXT972MLC.A4
廠商： CORTINA SYSTEMS INC
元件分類(lèi)： 網(wǎng)絡(luò)接口
英文描述： DATACOM, ETHERNET TRANSCEIVER, PQFP48
封裝： ROHS COMPLIANT, LQFP-48
文件頁(yè)數(shù)： 55/92頁(yè)
文件大?。?/td> 1257K
代理商： WJLXT972MLC.A4
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
Datasheet
59
Document Number: 302875-005
Revision Date: 27-Oct-2005
Figure 20 shows the LXT972M Transceiver in a typical twisted-pair interface, with the RJ-45
connections configured for a NIC application.
Figure 20. Intel
LXT972M Transceiver Typical Twisted-Pair Interface - NIC
1. Center tap current may be supplied from 3.3 V VCCA as shown. Additional power savings may be
realized by supplying the center tap from a 2.5 V current source. A separate ferrite bead (rated at 50
mA) should be used to supply center-tap current.
2. The 100
Ω transmit load termination resistor typically required is integrated in the LXT972M
Transceiver.
3. Magnetics without a receive pair center tap do not require a 2 kV termination.
4. RJ-45 connections shown for standard NIC. TX/RX crossover may be required for repeater and
switch applications.
TPIP
TPIN
* = 0.001
μF / 2.0 kV
To
Tw
is
te
d
-Pa
ir
N
e
tw
o
rk
1:1
Intel
LXT972M
Transceiver
1:1
1
TPOP
TPON
VCCA
GND
0.1
μF
.01
μF
2
270 pF 5%
0.01
μF
50
Ω 1%
50
Ω 1%
**
3
SD/TP_L
6
3
8
7
5
4
1
2
50
Ω
50
Ω
50
Ω
RJ-45
50
Ω
50
Ω
50
Ω
4
0.1
μF
B3513-01
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