參數(shù)資料
型號: WF8M32-XG4DX5
英文描述: Flash MCP
中文描述: 閃存MCP的
文件頁數(shù): 1/10頁
文件大小: 122K
代理商: WF8M32-XG4DX5
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
HI-RELIABILITY PRODUCT
WF8M32-XG4DX5
October 1999 Rev. 3
8Mx32 5V FLASH MODULE
ADVANCED*
FEATURES
I
Access Time of 100, 120, 150ns
I
Packaging:
68 Lead, 40 mm(1.560") square hermetic CQFP, 5.2 mm
(0.205") high (Package 503)
I
Sector Architecture
32 equal size sectors of 64KBytes per each 2Mx8 chip
Any combination of sectors can be erased. Also supports
full chip erase.
I
100,000 Write/Erase Cycles Minimum
I
Organized as 8Mx32
I
Commercial, Industrial, and Military Temperature Ranges
I
5 Volt Read and Write. 5V
±
10% Supply.
I
Low Power CMOS
I
Data Polling and Toggle Bit feature for detection of program
or erase cycle completion.
I
Supports reading or programmng data to a sector not being
erased.
I
RESET pin resets internal state machine to the read mode.
(Not available in HIP package for WF2M32-XHX5)
I
Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation, Seperate Power and Ground Planes to
improve noise immunity.
I
Built in Buffering.
* Ths data sheet describes a product that may or may not be under
development, andis subect to change or cancellationwithout notice.
Note: For programmng informationrefer to FlashProgrammng 16M5
AppicationNote.
PIN DESCRIPTION
FIG. 1
PIN CONFIGURATION FOR WF8M32-XG4DX5
TOP VIEW
I/O
0-31
Data Inputs/Outputs
A
0-22
Address Inputs
WE
Write Enable
CS
1-4
Chip Selects
OE
Output Enable
V
CC
Power Supply
RESET
Reset
GND
Ground
NC
Not Connected
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
V
C
A
1
A
1
A
1
A
1
A
1
A
1
C
2
O
C
4
A
1
A
1
A
1
A
2
A
R
A
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
N
A
0
A
1
A
2
A
3
A
4
A
5
C
1
G
C
3
W
A
6
A
7
A
8
A
9
A
1
V
C
BLOCK DIAGRAM
2M x 8
2M x 8
OE
A
0-22
WE
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
2M x 8
RESET
CS
1-4
2M x 8
2M x 8
I/O
0-31
I
1
4
1
1
23
1
4
1
1
23
CS
1
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
CS
2
CS
3
CS
4
32
CS
1
selects I/O
0-7
, CS
2
selects I/O
8-15
, CS
3
selects I/O
16-23
, CS
4
selects I/O
24-31
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