參數(shù)資料
型號: WED2ZL361MS30BC
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: SRAM
英文描述: 1M X 36 ZBT SRAM, 3 ns, PBGA119
封裝: PLASTIC, BGA-119
文件頁數(shù): 9/12頁
文件大?。?/td> 645K
代理商: WED2ZL361MS30BC
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
WED2ZL361MS
Oct, 2002
Rev. 5
White Electronic Designs Corp. reserves the right to change products or specications without notice.
SNOOZE MODE is a low-current, “power-down” mode
in which the device is deselected and current is reduced
to ISB2Z. The duration of SNOOZE MODE is dictated by
the length of time Z is in a HIGH state. After the device
enters SNOOZE MODE, all inputs except ZZ become
gated inputs and are ignored. ZZ is an asynchronous, ac-
tive HIGH input that causes the device to enter SNOOZE
MODE.
When ZZ becomes a logic HIGH, ISB2Z is guaranteed after
the setup time tZZ is met. Any READ or WRITE operation
pending when the device enters SNOOZE MODE is not
guaranteed to complete successfully. Therefore, SNOOZE
MODE must not be initiated until valid pending operations
are completed.
SNOOZE MODE
FIG 1 SNOOZE MODE TIMING DIAGRAM
ZZ
ISUPPLY
CLOCK
ALL INPUTS
(except ZZ)
Output (Q)
tZZ
tZZI
tRZZ
tRZZI
HIGH-Z
DESELECT or READ Only
IISB2Z
DON'T CARE
Description
Conditions Symbol
Min
Max
Units
Notes
Current during SNOOZE MODE
ZZ ≥ VIH
ISB2Z
10
mA
ZZ active to input ignored
tZZ
2(tKC)
ns
1
ZZ inactive to input sampled
tRZZ
2(tKC)
ns
1
ZZ active to snooze current
tZZI
2(tKC)
ns
1
ZZ inactive to exit snooze current
tRZZI
ns
1
SNOOZE MODE
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