
0
64
16
32
48
Membership
Functions
related to
INPUT 1
Membership
Functions
related to
INPUT 2
Membership
Functions
related to
INPUT 3
Membership
Functions
related to
INPUT 4
0
1 6
8
0
0
8
MFs related
to INPUT8
MFs related
to INPUT7
MFs related
to INPUT6
MFs related
to INPUT5
MFs related
to INPUT4
MFs related
to INPUT3
MFs related
to INPUT2
MFs related
to INPUT1
64
Figure12. AntecedentMemory Spaces.
0
256 Microcode
ConsequentMFs
related to RULE 256
Microcode
ConsequentMFs
related to RULE 1
Microcode
ConsequentMFs
related to RULE 2
1
2
0
2
Number of Words to load from the external
Memory
A/D Start Conversion Pulse width
On-Line phase Master/Slave
Handshaking signals polarity
Numberof Inputs -1
Numberof Outputs -1
Antece dent Memory Configuration
3
4
1
Figure13. Program/ConsequentMemory and Register Bench.
MEMORY
There are three memories in W.A.R.P.2.0,
Antecedent Memory (AM), The Program/Conse-
quent Memory (PCM) and the Register Bench
(RB).
The AM is divided in 4 spaces, each having a
maximum of 64 bytes. It is also possible to divide
the AM in 8 parts, each having a maximum of 32
bytes.
It is possible to configure the AM in the following
modes (see fig.12):
a) up to 4 inputs, each with 16 Antecedent MFs
(MAX);
b) up to 8 inputs, each with 8 Antecedent MFs
(MAX);
Eachword (4 byte) of the AMcontains the data of
a singleMF related to an input.If W.A.R.P.2.0has
been configured to accept up to 4 inputs it is
the
possible to have up to 16 MFs for each input. If
W.A.R.P.2.0 hasbeen configuredto accept upto 8
inputs it is possible to have up to 8 MFs for each
input. Each MF of the AM contains 3 (or 2) bit
indicating to which input variable the MF is corre-
lated.
The PCM is composedby 256words (seefig. 13).
Each row (word) is related to a single rule and
contains36bitof microcodeand8bitindicatingthe
consequent MF (crisp) relatedto this rule.
The RB contains data for the configuration of the
processor that canbe set by software.
It is possibleto fix:
the number of inputs, the number of outputs, the
address of the last word to load from the external
memory, the number of MF per input, the width of
the start A/D conversion pulse, the handshaking
signals polarity and the functioning mode of the
processor (Master/Slave).
12/28
W.A.R.P.2.0