參數(shù)資料
型號: W99802G
廠商: WINBOND ELECTRONICS CORP
元件分類: 通信及網(wǎng)絡
英文描述: SPECIALTY TELECOM CIRCUIT, PBGA184
封裝: 10 X 10 MM, 1.60 MM HEIGHT, LEAD FREE, LFBGA-184
文件頁數(shù): 18/31頁
文件大?。?/td> 371K
代理商: W99802G
W99802G
Publication Release Date: Mar. 3, 2006
- 25 -
Revision A0
5.3.9
Host Universal Synchronous Serial Interface AC Characteristics
UCK
UCS, UDO
T
UOS
output valid
UCK
UDI
T
IUIS
T
IUIH
input valid
T
UCKH
T
UCKL
T
UCK
T
UOH
Figure 5-9 Universal Synchronous Serial Interface Timing Diagram
Table 5-11 Host Universal Synchronous Serial Interface Timing
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
TCLKH
Clock Output High Time
0.4
---
SCLK
TCLKL
Clock Output Low Time
0.4
---
SCLK
TCLK
Clock Cycle Time
1.0
---
SCLK
TUOS
UCS#, UDO Output Setup Time
0.3
---
SCLK
TUOH
UCS#, UDO Output Hold Time
0.3
---
SCLK
TUIS
UDI Input Setup Time
0.3
---
SCLK
TUIH
UDI Input Hold Time
0.3
---
SCLK
Note: SCLK = 4 * PCLK (APB Clock, the frequency of this clock is specified by Clock Divider Register-0 & 1)
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