- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄361798 > W982516AH-8H x16 SDRAM PDF資料下載
參數(shù)資料
| 型號(hào)： | W982516AH-8H |
| 英文描述： | x16 SDRAM |
| 中文描述： | x16內(nèi)存 |
| 文件頁(yè)數(shù)： | 14/41頁(yè) |
| 文件大?。?/td> | 1369K |
| 代理商： | W982516AH-8H |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)當(dāng)前第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)
W982504AH
- 14 -
The Power Down mode is exited by bringing CKE high. When CKE goes high, a No Operation
Command is required on the next rising clock edge, depending on t
CK
. The input buffers need to be
enabled with CKE held high for a period equal to t
CKS
(min) + t
CK
(min).
No Operation Command
The No Operation Command should be used in cases when the SDRAM is in a idle or a wait state to
prevent the SDRAM from registering any unwanted commands between operations. A No Operation
Command is registered when CS is low with RAS, CAS, and WE held high at the rising edge of the
clock. A No Operation Command will not terminate a previous operation that is still executing, such as
a burst read or write cycle.
Deselect Command
The Deselect Command performs the same function as a No Operation Command. Deselect
Command occurs when CS is brought high, the RAS, CAS, and WE signals become don't cares.
Clock Suspend Mode
During normal access mode, CKE must be held high enabling the clock. When CKE is registered low
while at least one of the banks is active, Clock Suspend Mode is entered. The Clock Suspend mode
deactivates the internal clock and suspends any clocked operation that was currently being executed.
There is a one clock delay between the registration of CKE low and the time at which the SDRAM
operation suspends. While in Clock Suspend mode, the SDRAM ignores any new commands that are
issued. The Clock Suspend mode is exited by bringing CKE high. There is a one clock cycle delay
from when CKE returns high to when Clock Suspend mode is exited.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W986432DH-5 | SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC |
| W986432DH-6 | SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC |
| W986432DH-6I | SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC |
| W986432DH-7 | SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC |
| W986432DH-7L | SDRAM|4X512KX32|CMOS|TSSOP|86PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W982516BH | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH-7 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH-75 | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75I | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
| W982516BH75L | 制造商:WINBOND 制造商全稱(chēng):Winbond 功能描述:4M X 4 BANKS X 16 BIT SDRAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。