參數(shù)資料
型號: W921E400
廠商: WINBOND ELECTRONICS CORP
英文描述: 4-Bit Microcontroller(4位微控制器)
中文描述: 4位微控制器(4位微控制器)
文件頁數(shù): 20/53頁
文件大?。?/td> 394K
代理商: W921E400
W921E400A/W921C400
- 20 -
SRSPC register: (address = 00BH, default data = 0H)
b3
b2
b1
b0
b1 b0
Input frequency
0
0
0
1
1
0
1
1
fsys/4 Hz
fsys/8 Hz
fsys/16 Hz
b3 b2
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
0
0
0
1
1
0
1
1
1
1
0
0
0
0
0
1
1
0
fsys/32 Hz
fsys/64 Hz
fsys/128 Hz
fsys/256 Hz
fsys/512 Hz
fsys/1024 Hz
fsys/2048 Hz
Reserved
Normally the WCLK or RCLK pin will remain in high state and the serial data will be latched at the
rising edge of the WCLK or RCLK signal, but the serial clock inverter control register (SRINV) will
invert the above function. In this case WCLK or RCLK pin will remain in low state and the serial data
will be latched at the falling edge of the WCLK or RCLK signal.
The transmitting serial clock can come from WCLK or RCLK, depending on which one is enabled. If
the serial function is disabled, it will cause the relative pins to be in high impedance and it will not
affect the contents of serial buffer registers (start at address 050H).
6.7 DTMF Generator
There is one dual tone multi-frequency (DTMF) generator channel in this chip. The correct DTMF
output frequency is decided by the OSCCTR register as shown below.
OSCCTR register: (address = 013H, default data = 0H)
b3
b2
b1
b0
Reserved
b2
b1
b0
0
0
0
0
1
1
0
0
1
1
0
0
0
1
0
1
0
1
Osc. Selection
400 KHz
800 KHz
2 MHz
4 MHz
Reserved
3.58MHz
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