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參數(shù)資料
| 型號： | W78M64VP110SBC |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | 存儲器 |
| 英文描述： | SPECIALTY MEMORY CIRCUIT, PBGA156 |
| 封裝： | 13 X 22 MM, PLASTIC, BGA-156 |
| 文件頁數(shù)： | 44/48頁 |
| 文件大小： | 1548K |
| 代理商： | W78M64VP110SBC |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M64VP-XSBX
October 2008
Rev. 2
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
operation. See Write Buffer Programming when
using the write buffer.
Programming to the same word address multiple
times without intervening erases is permitted.
Single Word Programming
Single word programming mode is one method of
programming the Flash. In this mode, four Flash command
write cycles are used to program an individual Flash
address. The data for this programming operation could
be 8 or 16-bits wide.
While the single word programming method is supported
by most Spansion devices, in general Single Word
Programming is not recommended for devices that support
Write Buffer Programming. See Table 38 for the required bus
cycles and FIG: 4 for the owchart. When the Embedded
Program algorithm is complete, the device then returns to
the read mode and addresses are no longer latched. The
system can determine the status of the program operation
by reading the DQ status bits. Refer to Write Operation
Status for information on these status bits.
During programming, any command (except the
Suspend Program command) is ignored.
The Secured Silicon Sector, Autoselect, and CFI
functions are unavailable when a program operation
is inprogress.
A hardware reset immediately terminates the
program operation. The program command
sequence should
be reinitiated once the device has returned to the
read mode, to ensure data integrity.
Programming to the same address multiple times
continuously (for example, “walking” a bit within a
word) is permitted.
Write Buffer Programming
Write Buffer Programming allows the system to write a
maximum of 32 words in one programming operation. This
results in a faster effective word programming time than the
standard “word” programming algorithms.
The Write Buffer Programming command sequence is
initiated by rst writing two unlock cycles. This is followed by
a third write cycle containing the Write Buffer Load command
written at the Sector Address in which programming occurs.
At this point, the system writes the number of “word locations
minus 1” that are loaded into the page buffer at the Sector
Address in which programming occurs. This tells the
device how many write buffer addresses are loaded with
data and therefore when to expect the “Program Buffer
to Flash” confirm command. The number of locations
to program cannot exceed the size of the write buffer or
the operation aborts. (Number loaded = the number of
locations to program minus 1. For example, if the system
programs 6 address locations, then 05h should be written
to the device.)
The system then writes the starting address/data
combination. This starting address is the rst address/data
pair to be programmed, and selects the “write-buffer-page”
address. All subsequent address/data pairs must fall within
the elected-write-buffer-page.
The “write-buffer-page” is selected by using the addresses
AMAX–A5.
The “write-buffer-page” addresses must be the same for all
address/data pairs loaded into the write buffer. (This means
Write Buffer Programming cannot be performed across
multiple “write-buffer-pages.” This also means that Write
Buffer Programming cannot be performed across multiple
sectors. If the system attempts to load programming data
outside of the selected “write-buffer-page”, the operation
ABORTs.)
After writing the Starting Address/Data pair, the system
then writes the remaining address/data pairs into the write
buffer.
Note that if a Write Buffer address location is loaded multiple
times, the “address/data pair” counter is decremented for
every data load operation. Also, the last data loaded at
a location before the “Program Buffer to Flash” conrm
command is the data programmed into the device. It is
the software's responsibility to comprehend ramications
of loading a write-buffer location more than once. The
counter decrements for each data load operation, NOT
for each unique write-buffer-address location. Once the
specied number of write buffer locations have been loaded,
the system must then write the “Program Buffer to Flash”
command at the Sector Address. Any other address/data
write combinations abort the Write Buffer Programming
operation. The Write Operation Status bits should be used
while monitoring the last address location loaded into the
write buffer. This eliminates the need to store an address
in memory because the system can load the last address
location, issue the program conrm command at the last
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相關代理商/技術參數(shù) |
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|---|---|
| W78M64VP110SBM | 制造商:Microsemi Corporation 功能描述:8MX64 FLASH 3.3V PAGE MODE - Bulk |
| W78M64V-XSBX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Flash MCP |
| W78NCSX-23 | 功能描述:低信號繼電器 - PCB 4PDT 3A 24VDC IND RoHS:否 制造商:NEC 觸點形式:2 Form C (DPDT-BM) 觸點電流額定值: 線圈電壓:5 V 最大開關電流:1 A 線圈電流:1 A 線圈類型:Non-Latching 功耗:140 mW 端接類型:SMT 絕緣: 介入損耗: |
| W78PCX-1 | 制造商:Magnecraft 功能描述: |
| W78PCX-2 | 制造商:Magnecraft 功能描述: |
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