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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W78M32VP-XBX
January 2010
Rev. 12
White Electronic Designs Corp. reserves the right to change products or specications without notice.
NOTES
1. No software command sequence unlocks this bit unless
the device is in the password protection mode; only a
hardware reset or a power-up clears this bit.
2. The PPB Lock Bit must be set (programmed to “0”) only
after all PPBs are conFIG:d to the desired settings.
PASSWORD PROTECTION METHOD
The Password Protection Method allows an even higher
level of security than the Persistent Sector Protection Mode
by requiring a 64-bit password for unlocking the device PPB
Lock Bit. In addition to this password requirement, after
power up and reset, the PPB Lock Bit is set “0” to maintain
the password mode of operation. Successful execution
of the Password Unlock command by entering the entire
password clears the PPB Lock Bit, allowing for sector PPBs
modications.
NOTES
1. There is no special addressing order required for
programming the password. Once the Password is
written and veried, the Password Mode Locking Bit
must be set in order to prevent access.
2. The Password Program Command is only capable of
programming “0”s. Programming a “1” after a cell is
programmed as a “0” results in a time-out with the cell
as a “0”.
3. The password is all “1”s when shipped from the factory.
4. All 64-bit password combinations are valid as a password.
5. There is no means to verify what the password is after
it is set.
6. The Password Mode Lock Bit, once set, prevents
reading the 64-bit password on the data bus and further
password programming.
7. The Password Mode Lock Bit is not erasable.
8. The lower two address bits (A1–A0) are valid during the
Password Read, Password Program, and Password
Unlock.
9. The exact password must be entered in order for the
unlocking function to occur.
10. The Password Unlock command cannot be issued
any faster than 1 μs at a time to prevent a hacker from
running through all the 64-bit combinations in an attempt
to correctly match a password.
11. Approximately 1 μs is required for unlocking the device
after the valid 64-bit password is given to the device.
12. Password verification is only allowed during the
password programming operation.
13. All further commands to the password region are
disabled and all operations are ignored.
14. If the password is lost after setting the Password Mode
Lock Bit, there is no way to clear the PPB Lock Bit.
15. Entry command sequence must be issued prior to any
of any operation and it disables reads and writes for
Sector 0. Reads and writes for other sectors excluding
Sector 0 are allowed.
16. If the user attempts to program or erase a protected
sector, the device ignores the command and returns
to read mode.
17. A program or erase command to a protected sector
enables status polling and returns to read mode without
having modied the contents of the protected sector.
18. The programming of the DYB, PPB, and PPB Lock for a
given sector can be veried by writing individual status
read commands DYB Status, PPB Status, and PPB
Lock Status to the device.
HARDWARE DATA PROTECTION
METHODS
The device offers two main types of data protection at the
sector level via hardware control:
When WP#/ACC is at VIL, the either the highest or
lowest sector is locked (device specic).
There are additional methods by which intended or
accidental erasure of any sectors can be prevented via
hardware means. The following subsections describes
these methods:
WP#/ACC METHOD
The Write Protect feature provides a hardware method of
protecting one outermost sector. This function is provided
by the WP#/ACC pin and overrides the previously discussed
Sector Protection/Unprotection method.
If the system asserts VIL on the WP#/ACC pin, the device
disables program and erase functions in the highest or
lowest sector independently of whether the sector was
protected or unprotected using the method described in
Advanced Sector Protection/Unprotection.