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參數(shù)資料
| 型號： | W6662CF |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 消費家電 |
| 英文描述： | CCD(Correlated Double Sampler)/CIS(Contact Image Sensors) Analog Front End Signal Processor.(耦合采樣器／接觸圖象傳感器模擬前端信號處理器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 10 X 10 MM, 2 MM HEIGHT, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 1/19頁 |
| 文件大?。?/td> | 272K |
| 代理商： | W6662CF |
Preliminary W6662CF
SCANNER ANALOG FRONT END
Publication Release Date: December 1998
- 1 -
Revision A1
1. GENERAL DESCRIPTION
The W6662 is a highly integrated CCD/CIS analog front end signal processor. It provides the
components required for all necessary front-end signal process of a CCD/CIS scanner, including a 3-
channel input clamp circuit for correlated double sampling (short as CDS) mode, a multiplexer to mux
3-channel inputs to a correlated double sampling (CDS) circuit, a programmable offset adjusted and
gain controlled amplifier, a 12-bit analog-to-digital converter.
CDS or S&H (sample and hold) of operation modes can be chosen. The device configuration is
programmed via 3-wire or 4-wired interface, operation modes, offset and gain value of each channel
can be programmed.
2. FEATURES
12-bit A/D Converter
No Missing Code Guaranteed
Three channels analog input with clamp circuit individually
Integrated Correlated Double Sampler (CDS)
Supports Contact Image Sensors (CIS)
Accept CCD/CIS sensor with three channel or single channel analog out
External offset voltage input for CIS reference voltage
Built-in bandgap reference circuit for CDS mode and A/D Converter
Integrated 6-bit Programmable Gain Amplifier (PGA) with 3-channel register selected
Integrated 8-bit offset adjustment with 3-channel register selected
3 MHz sampling rate of offset/gain adjustment circuit
Three-wired or four-wired Serial Interface programmable
Registers readback capability
Low power CMOS device
Power down mode supported
3/5V digital I/O pin
Packageed in 48-pin QFP
Applications:
Flatbed Scanners
Sheetfeed Scanners
Film Scanners
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