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參數(shù)資料
| 型號： | W48S101-04 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Spread Spectrum Motherboard Frequency Generator(寬頻譜主板頻率發(fā)生器) |
| 中文描述： | 擴頻主板頻率發(fā)生器（寬頻譜主板頻率發(fā)生器） |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 143K |
| 代理商： | W48S101-04 |
PRELIMINARY
Spread Spectrum Motherboard Frequency Generator
W48S101-04
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
October 27, 1999, rev. **
Features
Maximized EMI suppression using Cypress’s Spread
Spectrum technology
I
2
C interface
Four copies of CPU output
Eight copies of PCI clock (synchronous w/CPU output)
Two copies of 14.318-MHz IOAPIC output
One copy of 48-MHz USB output
Selectable 24-/48-MHz clock-through-resistor
strapping
Three buffered copies of 14.318-MHz reference input
Input is a 14.318-MHz XTAL or reference signal
Selectable 100-MHz or 66-MHz CPU outputs
Power management control input pins
Test mode and output three-state through I
2
C interface
Key Specifications
Supply Voltages:....................................... V
DDQ3
= 3.3V±5%
V
DDQ2
= 2.5V±5%
CPU Cycle to Cycle Jitter:...........................................200 ps
CPU0:3 Output Skew: ................................................175 ps
PCI_F, PCI1:7 Output Skew: .......................................500 ps
CPU to PCI Output Skew: ............1.5 to 4.0 ns (CPU Leads)
Logic inputs and REF0/SEL48# have 250K pull-up resistors
except SEL100/66#.
I
2
C is a trademark of Philips Corporation.
Table 1. Pin Selectable Frequency
SEL
100/66#
CPU (MHz)
0
1
PCI
(MHz)
33.4
33.3
SPREAD#=0
±0.5% Center
±0.5% Center
66.8
100
Pin Configuration
Block Diagram
VDDREF
REF0/SEL48#
VDDAPIC
APIC0
CPU0
CPU1
GNDCPU0
VDDCPU1
CPU2
CPU3
GNDCPU1
PCI_F
XTAL
OSC
PLL Ref Freq
PLL 1
100/66#_SEL
X2
X1
REF1
VDDPCI0
Stop
Clock
Control
Stop
Clock
Control
PCI1
PWR_DWN#
Power
Down
Control
PCI2
PCI3
GNDPCI0
PCI4
PCI5
48MHz
24/48MHz
GND48MHz
PLL2
÷2/÷3
REF2
GNDREF
VDDCPU0
PCI_STOP#
CPU_STOP#
PCI6
PCI7
GNDPCI1
VDD48MHz
APIC1
GNDAPIC
GNDCORE0/1
VDDCORE0/1
VDDPCI1
SPREAD#
I
2
C
Logic
SDATA
SCLK
REF0/SEL48#
REF1
GNDREF
X1
X2
GNDPCI0
PCICLK_F
PCI1
VDDPCI0
PCI2
PCI3
GNDPCI1
PCI4
PCI5
VDDPCI1
PCI6
PCI7
GNDPCI2
VDDCORE0
GNDCORE0
VDD48MHz
48MHz
24/48MHz
GND48MHz
VDDREF
REF2
VDDAPIC
APIC0
APIC1
GNDAPIC
NC
VDDCPU0
CPU0
CPU1
GNDCPU0
VDDCPU1
CPUCLK2
CPUCLK3
GNDCPU1
VDDCORE1
GNDCORE1
PCI_STOP#
CPU_STOP#
PWR_DWN#
SPREAD#
SDATA
SCLK
SEL100/66#
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Note:
1.
Internal pull-up resistors should not be relied upon for
setting I/O pins HIGH.
[1]
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| W48S111 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Spread Spectrum Desktop/Notebook System Frequency Generator |
| W48S111-14 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Spread Spectrum Desktop/Notebook System Frequency Generator |
| W48S87 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Desktop/Notebook Frequency Generator |
| W48S87-04 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Spread Spectrum 3 DIMM Desktop Clock |
| W48S87-72 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Desktop/Notebook Frequency Generator |
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