參數(shù)資料
型號(hào): W48C111-16
廠商: Cypress Semiconductor Corp.
英文描述: Frequency Generator for Integrated Core Logic(在集成核心邏輯中應(yīng)用的頻率發(fā)生器)
中文描述: 頻率發(fā)生器集成的核心邏輯(在集成核心邏輯中應(yīng)用的頻率發(fā)生器)
文件頁數(shù): 1/7頁
文件大?。?/td> 114K
代理商: W48C111-16
PRELIMINARY
Frequency Generator for Integrated Core Logic
W48C111-16
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
November 2, 1999, rev. **
Features
Maximized EMI suppression using Cypress’s Spread
Spectrum technology
Power-on default to spread mode
Two copies of CPU output
Six copies of PCI output (synchronous w/CPU outputs)
One copy of 48-MHz USB output
One Buffered copy of 14.318-MHz input reference signal
Supports 100-MHz or 66-MHz CPU operation
Power management control input pins
Low Frequency Test Mode
Available in 28-pin SSOP (209 mil)
Key Specifications
Supply Voltages: .......................................V
DDQ3
= 3.3V±5%
V
DDQ2
= 2.5V±5%
CPU0:1 Skew: ............................................................175 ps
CPU0:1 Cycle to Cycle Jitter: .....................................200 ps
PCI_F, PCI1:5 Skew:...................................................500 ps
PCI_F, PCI1:5 Cycle to Cycle Jitter:............................250 ps
CPU to PCI Skew: ........................1.5 to 4.0 ns (CPU Leads)
Output Duty Cycle: .................................................... 45/55%
PCI_F, PCI Edge Rate:.............................................. >1 V/ns
CPU_STOP#, PWR_DWN#, PCI_STOP#: 250-k
pull-up
resistor
Table 1. Pin Selectable Frequency
SEL100/66#
CPU(0:1)
PCI
Spread%
0
66.6 MHz
33.3
±0.5%
1
100 MHz
33.3
±0.5%
Pin Configuration
Block Diagram
VDDQ3
REF
CPU0
CPU1
PCI_F
XTAL
OSC
PLL Ref Freq
PLL 1
SEL100/66#
X2
X1
VDDQ3
Stop
Clock
Control
Stop
Clock
Control
PCI1
PWR_DWN#
Power
Down
Control
PCI2
PCI3
PCI4
PCI5
÷2/÷3
VDDQ2
PCI_STOP#
CPU_STOP#
VDDQ3
PLL 2
48MHz
VDDQ3
GND
VDDQ3
REF
VDDQ2
CPU0
CPU1
GND
VDDQ3
GND
PCI_STOP#
CPU_STOP#
PWR_DWN#
48MHz
SEL100/66#
28
27
26
25
24
23
22
21
20
19
18
17
16
15
X1
X2
GND
PCI_F
PCI1
VDDQ3
PCI2
PCI3
VDDQ3
PCI4
PCI5
GND
VDDQ3
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
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參數(shù)描述
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W48C20 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Audio Subsystem Clock Generator
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