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參數(shù)資料
| 型號： | W3H128M72E-533NBM |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 128M X 72 DDR DRAM, 0.5 ns, PBGA208 |
| 封裝： | 16 X 22 MM, 1 MM PITCH, PLASTIC, BGA-208 |
| 文件頁數(shù)： | 18/31頁 |
| 文件大小： | 991K |
| 代理商： | W3H128M72E-533NBM |
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W3H128M72E-XNBX
25
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
December 2008
Rev. 2
ADVANCED
White Electronic Designs Corp. reserves the right to change products or specications without notice.
AC TIMING PARAMETERS
-55°C ≤ TA < +125°C
Parameter
Symbol
667Mbs CL6
533Mbs CL5
400Mbs CL4
Unit
Min
Max
Min
Max
Min
Max
Clock
Clock cycle time
CL=6
t
CK(6)
3,000
8,000
CL=5
t
CK(5)
3,750
8,000
3,750
8,000
5,000
8,000
ps
CL=4
t
CK(4)
5,000
8,000
5,000
8,000
5,000
8,000
ps
CK high-level width
t
CH
0.48
0.52
0.48
0.52
0.48
0.52
tCK
CK low-level width
t
CL
0.48
0.52
0.48
0.52
0.48
0.52
tCK
Half clock period
t
HP
MIN (tCH, tCL)
MIN (tCH, tCL)ps
Clock
(absolute)
Absolute tCK
t
CKabs
t
CKAVG
(MIN)+ tJITPER
(MIN)
t
CKAVG
(MAX)+ tJITPER
(MAX)
t
CKAVG
(MIN)+ tJITPER
(MIN)
t
CKAVG
(MAX)+ tJITPER
(MAX)
t
CKAVG
(MIN)+ tJITPER
(MIN)
t
CKAVG
(MAX)+ tJITPER
(MAX)
ps
Absolute CK high-level width
t
CHabs
t
CKAVG
(MIN)* tCHAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)*
t
CHAVG
(MAX)+ tJITDTY
(MAX)
t
CKAVG
(MIN)* tCHAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)*
t
CHAVG
(MAX)+ tJITDTY
(MAX)
t
CKAVG
(MIN)* tCHAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)* tCHAVG
(MAX)+ tJITDTY
(MAX)
ps
Absolute CK low-level width
t
CLabs
t
CKAVG
(MIN)*
t
CLAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)*
t
CLAVG
(MAX)+ tJITDTY
(MAX)
t
CKAVG
(MIN)*
t
CLAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)*
t
CLAVG
(MAX)+ tJITDTY
(MAX)
t
CKAVG
(MIN)*
t
CLAVG
(MIN)+ tJITDTY
(MIN)
t
CKAVG
(MAX)*
t
CLAVG
(MAX)+ tJITDTY
(MAX)
ps
Clock
Jitter
Clock jitter - period
t
JITPER
-125
125
-125
125
-125
125
ps
Clock jitter - half period
t
JITDUTY
-125
125
-125
125
-150
150
ps
Clock jitter - cycle to cycle
t
JITCC
250
ps
Cumulative jitter error, 2 cycles
t
ERR2per
-175
175
-175
175
-175
175
ps
Cumulative jitter error, 3 cycles
t
ERR3per
-225
225
-225
225
-225
225
ps
Cumulative jitter error, 4 cycles
t
ERR4per
-250
250
-250
250
-250
250
ps
Cumulative jitter error, 5 cycles
t
ERR5per
-250
250
-250
250
-250
250
ps
Cumulative jitter error, 6-10 cycles
t
ERR6-10per
-350
350
-350
350
-350
350
ps
Cumulative jitter error, 11-50 cycles tERR11-50per
-450
450
-450
450
-450
450
ps
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3H128M72E-533SBC | 制造商:Microsemi Corporation 功能描述:128M X 72 DDR2, 1.8V, 533MHZ, 208PBGA COMMERICAL TEMP. - Bulk |
| W3H128M72E-533SBI | 制造商:Microsemi Corporation 功能描述:128M X 72 DDR2, 1.8V, 533MHZ, 208PBGA INDUSTRIAL TEMP. - Bulk 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY |
| W3H128M72E-533SBM | 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY |
| W3H128M72E-667SBC | 制造商:Microsemi Corporation 功能描述:128M X 72 DDR2, 1.8V, 667MHZ, 208PBGA COMMERICAL TEMP. - Bulk |
| W3H128M72E-667SBI | 制造商:Microsemi Corporation 功能描述:128M X 72 DDR2, 1.8V, 667MHZ, 208PBGA INDUSTRIAL TEMP. - Bulk 制造商:Microsemi Corporation 功能描述:SDRAM MEMORY |
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