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參數(shù)資料
| 型號(hào)： | W3EG6433S265D3 |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 32M X 64 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | DIMM-184 |
| 文件頁(yè)數(shù)： | 7/12頁(yè) |
| 文件大?。?/td> | 262K |
| 代理商： | W3EG6433S265D3 |
4
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
W3EG6433S-D3
-JD3
November 2005
Rev. 2
PRELIMINARY
Parameter
Symbol
Value
Units
Voltage on any pin relative to VSS
VIN, VOUT
-0.5 to 3.6
V
Voltage on VCC supply relative to VSS
VCC, VCCQ
-1.0 to 3.6
V
Storage Temperature
TSTG
-55 to +150
°C
Power Dissipation
PD
24
W
Short Circuit Current
IOS
50
mA
Note:
Permanent device damage may occur if ‘ABSOLUTE MAXIMUM RATINGS’ are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability
ABSOLUTE MAXIMUM RATINGS
DC OPERATING CONDITIONS
Recommended perating conditions (Voltage referenced to VSS=0V, TA=0 to 70°C)
Parameter
Symbol
Min
Max
Unit
Note
Supply Voltage (for device with a nominal VCC of 2.5V)
VCC
2.3
2.7
V
I/O Supply Voltage
VCCQ
2.3
2.7
V
I/O Reference Voltage
VREF
0.49*VCCQ
0.51*VCCQ
V1
I/OTermination Voltage
VTT
VREF-0.04
VREF+0.04
V
2
Input Logic High Voltage
VIH
VREF + 0.15
VCCQ + 0.3
V
Input Logic Low Voltage
VIL
-0.3
VREF -0.15
V
Input Voltage Level, CK and CK# Inputs
VIN(DC)
-0.3
VCCQ + 0.3
V
Input Differential Voltage, CK and CK# Inputs
VID(DC)
0.36
VCCQ + 0.6
V
3
V-I Matching: Pullup to Pulldown Current Ratio
VI(Ratio)
0.71
1.4
-
4
Input leakage current
II
-2
2
uA
Output leakage current
IOZ
-5
5
uA
Output High Current(Normal strengh driver); VOUT = VTT = 0.84V
IOH
-16.8
uA
Output High Current(Normal strengh driver); VOUT = VTT = 0.84V
IOL
16.8
uA
Output High Current(Half strengh driver); VOUT = VTT = 0.45V
VOH
-9
uA
Output High Current(Half strengh driver); VOUT = VTT = 0.45V
VOL
9uA
NOTES:
1.
VREF is expected to be equal to 0.5*VCCQ of the transmitting device, and to track variations in the dc level of same. Peak-to peak noise on VREF may not exceed +/-2% of the dc
value.
2.
VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF, and must track variations in the DC level of
VREF.
3.
VID is the magnitude of the difference between the input level on CK and the input level on CK#.
4.
The ratio of the pullup current to the pulldown current is specied for the same temperature and voltage, over the entire temperature and voltage range, for device drain to source
voltages from 0.25V to 1.0V. For a given output, it represents the maximum difference between pullup and pulldown drivers due to process variation. The full variation in the ratio
of the maximum to minimum pullup and pulldown current will not exceed 1/7 for device drain to source voltages from 0.1 to 1.0.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W3EG6433S265JD3 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 2x16Mx64 DDR SDRAM UNBUFFERED |
| W3EG6433S335AD4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| W3EG6433S335BD4 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 32Mx64 DDR SDRAM UNBUFFERED, w/PLL |
| W3EG6433S335D3 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 2x16Mx64 DDR SDRAM UNBUFFERED |
| W3EG6433S335JD3 | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:256MB - 2x16Mx64 DDR SDRAM UNBUFFERED |
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