- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄68427 > W25Q32BWSSIG (WINBOND ELECTRONICS CORP) 4M X 8 SPI BUS SERIAL EEPROM, PDSO8 PDF資料下載
參數(shù)資料
| 型號(hào)： | W25Q32BWSSIG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 4M X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 0.208 INCH, GREEN, PLASTIC, SOIC-8 |
| 文件頁(yè)數(shù)： | 3/72頁(yè) |
| 文件大?。?/td> | 2212K |
| 代理商： | W25Q32BWSSIG |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)
W25Q32BW
condition will terminate after the next falling edge of CLK. During a /HOLD condition, the Serial Data
Output (DO) is high impedance, and Serial Data Input (DI) and Serial Clock (CLK) are ignored. The Chip
Select (/CS) signal should be kept active (low) for the full duration of the /HOLD operation to avoid
resetting the internal logic state of the device.
Publication Release Date: July 08, 2010
- 11 -
Preliminary - Revision E
9.2
WRITE PROTECTION
Applications that use non-volatile memory must take into consideration the possibility of noise and other
adverse system conditions that may compromise data integrity. To address this concern, the W25Q32BW
provides several means to protect the data from inadvertent writes.
9.2.1
Write Protect Features
Device resets when VCC is below threshold
Time delay write disable after Power-up
Write enable/disable instructions and automatic write disable after erase or program
Software and Hardware (/WP pin) write protection using Status Register
Write Protection using Power-down instruction
Lock Down write protection until next power-up
One Time Program (OTP) write protection
*
* Note: This feature is available upon special order. Please refer to the Ordering Information.
Upon power-up or at power-down, the W25Q32BW will maintain a reset condition while VCC is below the
threshold value of VWI, (See Power-up Timing and Voltage Levels and Figure 37). While reset, all
operations are disabled and no instructions are recognized. During power-up and after the VCC voltage
exceeds VWI, all program and erase related instructions are further disabled for a time delay of tPUW. This
includes the Write Enable, Page Program, Sector Erase, Block Erase, Chip Erase and the Write Status
Register instructions. Note that the chip select pin (/CS) must track the VCC supply level at power-up until
the VCC-min level and tVSL time delay is reached. If needed a pull-up resister on /CS can be used to
accomplish this.
After power-up the device is automatically placed in a write-disabled state with the Status Register Write
Enable Latch (WEL) set to a 0. A Write Enable instruction must be issued before a Page Program, Sector
Erase, Block Erase, Chip Erase or Write Status Register instruction will be accepted. After completing a
program, erase or write instruction the Write Enable Latch (WEL) is automatically cleared to a write-
disabled state of 0.
Software controlled write protection is facilitated using the Write Status Register instruction and setting
the Status Register Protect (SRP0, SRP1) and Block Protect (CMP, SEC,TB, BP2, BP1 and BP0) bits.
These settings allow a portion as small as 4KB sector or the entire memory array to be configured as
read only. Used in conjunction with the Write Protect (/WP) pin, changes to the Status Register can be
enabled or disabled under hardware control. See Status Register section for further information.
Additionally, the Power-down instruction offers an extra level of write protection as all instructions are
ignored except for the Release Power-down instruction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25Q40BWSNIP | 4M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q64BVSSIP | 8M X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q64CVZPAG | 64M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q64CVZEAG | 64M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q64CVDAIG | 64M X 1 SPI BUS SERIAL EEPROM, PDIP8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25Q32DW | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q32DWSFIG | 功能描述:IC FLASH SPI 32MBIT 16SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| W25Q32DWSFIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
| W25Q32DWSSIG | 功能描述:IC FLASH SPI 32MBIT 8SOIC RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:SpiFlash® 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| W25Q32DWSSIP | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。