參數(shù)資料
型號(hào): VP7615
廠商: Zarlink Semiconductor Inc.
英文描述: Colour Digital Video Camera Decoder IC
中文描述: 彩色數(shù)碼攝像機(jī)解碼器IC
文件頁數(shù): 9/26頁
文件大?。?/td> 302K
代理商: VP7615
8
VP7615
REGISTER DESCRIPTIONS
The VP7615 iCamHost processor station address is strap-configurable to any even location between 0x60 and 0x6E
inclusive. Since most iCam cameras currently built use the Station Address 0x68, it is recommended that the iCamHost be
strapped to a different address. The register addresses shown below are the sub-addresses written to the iCamHost
immediately after the Station Address. The 7 LSBs of the sub-address must match the specified address. The MSB of the
sub-address controls the auto-increment feature of the iCamHost. If the MSB of the sub-address is a ‘1’, (sub-addresses
0x80 through 0xFF), the sub-address register in the iCamHost is incremented to the next address immediately after the data
register is read or written. If the MSB of the sub-address is a ‘0’, (sub-addresses 0x00 through 0x7F), the sub-address register
in the iCamHost remains constant regardless of any reads or writes to the data register. All registers default to 0x00 following
chip reset unless otherwise noted.
Address 0x00 Configuration Control Register
Read/Write
Bits 7 - 4
Always read as ‘0’
Bit 3
Cfg3 - Camera Input Port Enable
‘1’ CamPort ‘B’ is source
‘0’ CamPort ‘A’ is source
Bit 2
Cfg2 - Colour Bar Enable
‘1’ Colour Bar Test Pattern Output
‘0’ Normal Video Output
Bit 1
Cfg1 - RGB to YUV Converter Bypass
‘1’ Green + BnR Pattern Output
‘0’ Normal YUV Output
Bit 0
Cfg0 - Separator Bypass
‘1’ Sum = CCD Data, Diff = 0
‘0’ Normal Separator Output
Address 0x01 RESERVED
Address 0x02 Peak Luma Filter Control Register
Read/Write
Bits 7 - 3
Always read as ‘0’
Bits 2 - 0
Peak Luma Filter Control
‘000’ - PLF K = 1, No Luma Filter
‘001’ - PLF K = 1/2, Fast Luma Filter
‘010’ - PLF K = 1/4, Med Fast Luma Filter
‘011’ - PLF K = 1/8, Med Slow Luma Filter
‘1XX’ - PLF K = 1/16, Slow Luma Filter
Address 0x03 RESERVED
Address 0x04 Horizontal Start Register
Read/Write
Bits 7 - 0
Horizontal Start Register
Four times the value of this register is the
Horizontal starting pixel for the Metrics window.
7
0
6
0
5
0
4
0
3
Cfg3
2
Cfg2
1
Cfg1
0
Cfg0
7
0
6
0
5
0
4
0
3
0
2
PLF2
1
PLF1
0
PLF0
7
HStrt7
6
HStrt6
5
HStrt5
4
HStrt4
3
HStrt3
2
HStrt2
1
HStrt1
0
HStrt0
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