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參數(shù)資料
| 型號(hào)： | VP510 |
| 廠商： | Zarlink Semiconductor Inc. |
| 英文描述： | Bi Directional Colour Space Converter |
| 中文描述： | 雙向定向色彩空間轉(zhuǎn)換 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 312K |
| 代理商： | VP510 |
VP 510
4
filter with 13.5 MHz output sampling.
CHROMINANCE FILTERS
Each chrominance channel has two 11 tap filters in series
and each pair can decimate or interpolate by four. The MODE
bit defines whether the filters interpolate or decimate. The
coefficients are 10 bit internally defined values, and are the
same in both modes. Figure 4 illustrates the bit significance at
various points in the calculation.
When the filters are used to decimate chrominance pro-
duced by the matrix converter, the inputs are represents by
either 8 or 9 signed integer bits plus 3 fractional bits. When the
matrix coefficients have been chosen to produce normalized
chrominance, the range can be represented by 8 integer bits.
Otherwise 9 integer bits are needed. When the inputs are
chrominance from the pins, the 3 fractional bits are set to zero,
and the ninth bit is sign extended. Words within the filter
calculation are allowed to grow to 15 integer bits plus 6
fractional bits. This is then rounded to 15 bits plus 3 fractional
bits.
When the filter is used to supply interpolated data to the
matrix converter, the least significant 10 integer bits are
selected out of the 15 outputs. Only 9 integer bits are actually
needed to represent the filtered chrominance with undershoot
and overshoot, but the hardware multiplier expects a 10 bit
number.
When the filter is producing decimated chrominance, the
NORM bit in the Control Register is used to select which 12
integer and fractional bits will be used by the rounding and
clipping circuit. For a full description of this operation see the
section on Chrominance Outputs.
The response of the filters is given in Figure 5. These
results were obtained with 10 bit quantized coefficients and
unquantized data. The effects of the various quantization
steps within the filter, and then finally rounding down to a 9 bit
value are superimposed onto Figure 5. Also shown is the
CCIR601 specification for sample rate conversion down to
4:2:2 resolution.
RGB INPUTS
The 24 bit RGB data must meet the set up and hold
requirements, with respect to the rising edge of the clock,
which are specified in Figure 6. The first edge after HREF has
gone inactive ( i.e. high ) must strobe in the first samples if the
delay to the first correctly filtered output is to match the fixed
pipline delay of 39 clock to the HDLY and FO outputs. The
maximum range is 0 to 255 for each component. If the
coefficients in the matrix converter are defined for a restricted
input range then this must be guaranteed by the user. Alterna-
tively the look up tables can be used to limit the range. When
HREF goes active low the outputs will go low after 39 clocks.
The VP510 has been designed to accept two times over-
sampled RGB data from an A/D converter. This avoids the
need for analog anti aliasing filters before the A/D converters.
For this reason the clock used by the VP510 is expected to be
twice the sampling clock needed to produce a given number
of RGB pixels per line. If the RGB inputs have not been
oversampled this double rate clock should still be used. Each
incoming sample will then be internally used twice, but the
decimating filters will still produce the correct luminance and
chrominance values.
Each input directly addresses its own RAM, which has
been pre-loaded to meet the system requirements. Linear
NORMALIZED FREQUENCY
Figure 4. Bit significance
Figure 5. Response of the Chrominance Filters
TWO MAC
ARRAYS
RGB
From
Pins
From
Matrix
1.9
Coefficents
15.6
15.3
ROUND
9
CLIP TO 8 BITS
Signed 8.0 to Pins
SELECT 9 LS
INTEGER BITS
+ MS FRACTIONAL
9.1
10.3
To Matrix
Converter
in Interpolate
Mode
8.000
8.3 Normalized
9.3 Un - normalized
NORM CONTROL
BIT
ROUND WITH
MS FRACTIONAL
9
SELECT 10 LS
INTEGER BITS
(NO FRACTIONAL)
10.0
ROUND
WITH LSB
0.1 0.2 0.3 0.4 0.5
0
10
20
30
40
50
60
70
80
Quantized Coefficients, FP data
CCIR601 Specification
Quantized Coefficients and Data
0.0
0.05
-0.05
-0.1
0.1
0.15
0.1
0.15
0.05
Peak 0.25 dB
PASSBAND RIPPLE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VP510CGGPFR | Bi Directional Colour Space Converter |
| VP520CGGGWR | Video Converter Circuit |
| VP520CGGH1R | Video Converter Circuit |
| VP520SCGGH1R | PAL/NTSC to CIF/QCIF Converter |
| VP520SCG | PAL/NTSC to CIF/QCIF Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| VP510CGGPFR | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:Bi Directional Colour Space Converter |
| VP511 | 制造商:Platt Luggage 功能描述:Vacuum Pack |
| VP5-1200 | 制造商:COOPER BUSSMANN 功能描述:Ind General Purpose 76.8uH 30% Ferrite 2.08A Bulk |
| VP5-1200-R | 功能描述:固定電感器 76.8uH 0.2A 0.047ohms RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| VP5-1200TR | 制造商:COOPER BUSSMANN 功能描述:Ind Power Wirewound 76.8uH 30% Ferrite 2.08A T/R |
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