參數(shù)資料
型號: VP1310
廠商: ELAN Microelctronics Corp .
英文描述: P-Channel Enhancement-Mode Vertical DMOS FET(擊穿電壓-100V,25Ω,P溝道增強型垂直DMOS結(jié)構(gòu)場效應(yīng)管)
中文描述: P通道增強模式垂直的DMOS場效應(yīng)管(擊穿電壓- 100V的,25Ω,P溝道增強型垂直的DMOS結(jié)構(gòu)場效應(yīng)管)
文件頁數(shù): 2/4頁
文件大?。?/td> 31K
代理商: VP1310
7-252
90%
10%
90%
90%
10%
10%
PULSE
GENERATOR
V
DD
R
L
OUTPUT
D.U.T.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
gen
0V
-10V
VP1304/VP1306/VP1310
Switching Waveforms and Test Circuit
Package
I
D
(continuous)*
I
D
(pulsed)
Power Dissipation
@ T
C
= 25
°
C
θ
jc
°
C/W
θ
ja
°
C/W
I
DR
*
I
DRM
TO-92
*
I
D
(continuous) is limited by max rated T
j.
T
A
= 25
°
C
-0.15A
-0.65A
1.0W
125
170
-0.15A
-0.65A
Thermal Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
VP1310
-100
VP1306
-60
VP1304
-40
V
GS(th)
V
GS(th)
I
GSS
I
DSS
Gate Threshold Voltage
-1.5
-3.5
V
V
GS
= V
DS
, I
D
= -1mA
V
GS
= V
DS
, I
D
= -1mA
V
GS
=
±
20V, V
DS
= 0V
V
GS
= 0V, V
DS
= Max Rating
V
GS
= 0V, V
DS
= 0.8 Max Rating
T
A
= 125
°
C
V
GS
= -5V, V
DS
= -25V
V
GS
= -10V, V
DS
= -25V
V
GS
= -5V, I
D
= -50mA
V
GS
= -10V, I
D
= -250mA
V
GS
= -10V, I
D
= -250mA
V
DS
= -25V, I
D
= -200mA
Change in V
GS(th)
with Temperature
Gate Body Leakage
-3.2
-3.85
mV/
°
C
-0.1
-100
nA
Zero Gate Voltage Drain Current
-10
-500
μ
A
I
D(ON)
ON-State Drain Current
-0.08
-0.23
-0.25
-0.7
R
DS(ON)
32
40
19
25
R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Change in R
DS(ON)
with Temperature
Forward Transconductance
0.8
1.1
%/
°
C
75
120
m
Input Capacitance
20
35
Common Source Output Capacitance
12
15
pF
Reverse Transfer Capacitance
3
5
Turn-ON Delay Time
3
5
Rise Time
3
5
Turn-OFF Delay Time
3
5
Fall Time
3
8
Diode Forward Voltage Drop
-1.2
-1.7
V
I
SD
= -0.25A, V
GS
= 0V
I
SD
= -0.25A, V
GS
= 0V
Reverse Recovery Time
350
ns
Notes:
1. All D.C. parameters 100% tested at 25
°
C unless otherwise stated. (Pulse test: 300
μ
s pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Electrical Characteristics
(@ 25
°
C unless otherwise specified)
BV
DSS
Drain-to-Source
Breakdown Voltage
A
V
I
D
= -1mA, V
GS
= 0V
Static Drain-to-Source
ON-State Resistance
V
DD
= -25V
I
D
= -250mA
R
GEN
= 25
ns
V
GS
= 0V, V
DS
= -25V
f = 1 MHz
相關(guān)PDF資料
PDF描述
VP1316N2 P-Channel Enhancement-Mode Vertical DMOS Power FETs
VP1316N3 P-Channel Enhancement-Mode Vertical DMOS Power FETs
VP1410 Speech Synthesizer
VP1504 P-Channel Enhancement-Mode Vertical DMOS FETs
VP1506 P-Channel Enhancement-Mode Vertical DMOS FETs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VP1310N3 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:P-Channel Enhancement-Mode Vertical DMOS FETs
VP1310N8 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | MOSFET | P-CHANNEL | 100V V(BR)DSS | TO-243AA
VP1316N2 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:P-Channel Enhancement-Mode Vertical DMOS Power FETs
VP1316N3 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:P-Channel Enhancement-Mode Vertical DMOS Power FETs
VP1320N2 制造商:SUPERTEX 制造商全稱:SUPERTEX 功能描述:P-Channel Enhancement-Mode Vertical DMOS Power FETs