參數(shù)資料
型號: VP1040
廠商: Texas Instruments, Inc.
元件分類: CAN
英文描述: LOW-POWER CAN TRANSCEIVER WITH BUS WAKE-UP
中文描述: 低功耗的CAN收發(fā)器總線喚醒
文件頁數(shù): 2/23頁
文件大小: 478K
代理商: VP1040
www.ti.com
DESCRIPTION (Continued)
The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The
high-speed mode of operation is selected by connecting STB to ground.
1
2
3
4
8
7
6
5
TXD
GND
V
CC
RXD
STB
CANH
CANL
SPLIT
SN65HVD1040
SN65HVD1040
SLLS631B–MARCH 2007–REVISED APRIL 2007
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor
standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater
than 5
μ
s on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller
may then reactivate the device when it needs to transmit to the bus.
A dominant-time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication
during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no
rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then
reset by the next rising edge on TXD.
The SPLIT output (pin 5) is available on the SN65HVD1040 as a V
CC
/2 common-mode bus voltage bias for a
split-termination network.
The SN65HVD1040 is characterized for operation from –40
°
C to 125
°
C.
ORDERING INFORMATION
DOMINANT
TIME-OUT
LOW-POWER
BUS MONITOR
MARKED
AS
PART NUMBER
PACKAGE
(1)
ORDERING NUMBER
SN65HVD1040D (rail)
SN65HVD1040DR (reel)
SN65HVD1040
YES
YES
SOIC-8
VP1040
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
www.ti.com
.
2
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