參數(shù)資料
型號(hào)： VMEH22501A
廠商： Texas Instruments, Inc.
英文描述： 8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS
中文描述： 8位通用總線收發(fā)器和兩個(gè)1位總線收發(fā)器與劈開(kāi)LVTTL港口，反饋路徑，以及三態(tài)輸出
文件頁(yè)數(shù)： 17/30頁(yè)
文件大小： 568K
代理商： VMEH22501A
SCES620 – DECEMBER 2004
17
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
driver in slot 1, with one receiver in slot 21 (minimum load) (continued)
skew characteristics for UBT for specific worst-case V
CC
and temperature within the
recommended ranges of supply voltage and operating free-air temperature (see Figure 3)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
TYP
MAX
UNIT
tsk(LH)
3A
3B
2
ns
tsk(HL)
2.3
tsk(LH)
CLKAB
3B
2.1
ns
tsk(HL)
2.4
3A
3B
1
ns
tsk(t)
CLKAB
3B
1
tsk(pp)
3A
3B
0.2
2.5
ns
CLKAB
3B
0.2
2.9
All typical values are at VCC = 3.3 V, TA = 25
°
C. All values are derived from TI-SPICE models.
tsk(t) Output-to-output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs of the same
packaged device. The specifications are given for specific worst-case VCC and temperature and apply to any outputs switching in opposite
directions, both low to high (LH) and high to low (HL) [tsk(t)].
By simulating the performance of the device using the VME64x backplane (see Figure 3), the maximum peak current
in or out of the B-port output, as the devices switch from one logic state to another, was found to be equivalent to
driving the lumped load shown in Figure 4.
From Output
Under Test
LOAD CIRCUIT
235
165
390 pF
5 V
Figure 4. Equivalent AC Peak Output-Current Lumped Load
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