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參數(shù)資料
| 型號： | VES1993 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Single Chip Satellite Channel Receiver(單片衛(wèi)星頻道接收器) |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | MQFP-100 |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 90K |
| 代理商： | VES1993 |
1999 Jan 01
5
Philips Semiconductors
Product specification
Single Chip Satellite Channel Receiver
VES1993
TABLE 1 : ABSOLUTE MAXIMUM RATINGS
Parameter
Ambient operating temperature (Ta)
DC supply voltage
DC input voltage
DC input current
Lead Temperature
Junction Temperature
Stresses above the absolute maximum ratings may cause permanent damage to the device. Exposure to absolute
maximum ratings conditions for extended periods may affect device reliability.
Min
0
- 0.5
- 0.5
Max
70
+4.1
Unit
°C
V
V
mA
°C
°C
VDD + 0.5
±
20
+ 300
+ 125
TABLE 2: RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VDD
Digital supply voltage
Min
Typ
Max
Unit
Notes
3.135
3.3
3.465
V
3.3V ±5%
VCC
5V supply voltage
4.75
5
5.25
V
pins 22 and 91
Ta
AVD
AVS
VINDC
VINAC
ZIN
VREFP
VREFN
XIN
ZOE (1)
DNL(2)
INL(3)
GE (4)
SINAD (5)
Operating temperature
Analog supply voltage
Analog ground
DC Analog Input
AC Analog Input
Analog input impedance
Top voltage reference
Bottom voltage reference
Crystal frequency
Zero Offset Error
Differential Non Linearity
Integral Non Linearity
Gain Error
ADC signal to noise ratio
0
3.135
70
3.465
° C
V
V
V
mVpp
Ohms
V
V
MHz
mV
LSB
LSB
mV
dB
Ambient temperature
pin 43
pin 44
pins 41 and 45
pins 41 and 45
pins 41 and 45
pin 46
pin 42
3.3
0
VREFN
VREFP
750
100
2.0
1.25
10
93
10
0.9
1
10
0.5
0.8
34
@ 1MHz input signal
and 92MHz sampling clock
THD(6)
VIH(7)
VIL
VOH(8)
VOL(8)
IDD
CIN
COUT
(1) Zero Offset Error : deviation of voltage input from ideal voltage to get the 00 code.
(2) Differential Non linearity : maximum deviation of the analog span of each output code from its ideal 1lsb value.
(3) Integral Non linearity : deviation of the ADC transfer curve from the ideal transfer curve, defined according to the
best straight line fit method.
(4) Gain Error : Deviation of voltage input from ideal value to get the highest code.
(5) Signal-to-noise plus distortion ratio (SINAD) : ratio between the RMS magnitude of the fundamental input
frequency to the RMS magnitude of all other A/D output signals.
(6) Total harmonic distortion (THD) : ratio of the RMS sum of all harmonics of the input signal (below one half of the
sample rate) to the fundamental.
(7) All inputs are 5V tolerant.
(8) IOH, IOL = ±4mA only for pins : SACLK, OCLK, SDA, SCL_0, SDA_0.
Total Harmonic Distorsion
High-level input voltage
Low-level input voltage
High-level output voltage
Low-level output voltage
Supply current
Input capacitance
Output capacitance
35
dB
V
V
V
V
mA/MBaud
pF
pF
2
-0.5
2.4
VCC+0.3
0.8
TTL input
TTL input
@IOH = -2mA to -4mA
@IOL = + 2 mA to +4mA
@XIN = 91MHz
1MHz input to VSS
1MHz input to VSS
0.4
8.5
15
15
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