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參數(shù)資料
| 型號： | VCH16245ADL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-bit bus transceiver with direction pin; 5V tolerant 3-State |
| 中文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 文件頁數(shù)： | 11/19頁 |
| 文件大?。?/td> | 107K |
| 代理商： | VCH16245ADL |
2003 Nov 25
11
Philips Semiconductors
Product specification
16-bit bus transceiver with direction pin; 5 V tolerant;
3-state
74LVC16245A;
74LVCH16245A
AC CHARACTERISTICS
GND = 0 V; t
r
= t
f
≤
2.5 ns.
Notes
1.
2.
All typical values are measured at T
amb
= 25
°
C.
Typical values are measured at V
CC
= 3.3 V and T
amb
= 25
°
C.
SYMBOL
PARAMETER
TEST CONDITIONS
MIN.
TYP.
(1)
MAX.
UNIT
WAVEFORMS
V
CC
(V)
T
amb
=
40 to +85
°
C
t
PHL
/t
PLH
propagation delay nAn to nBn;
nBn to nAn
see Figs 6 and 8
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.0
1.0
1.5
1.0
1.5
1.5
13.0
2.7
2.2
(2)
15.0
3.6
2.8
(2)
11.0
3.4
3.2
(2)
4.7
4.5
6.7
5.5
6.6
5.6
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
PZH
/t
PZL
3-state output enable time nOE
to nAn; nOE to nBn
see Figs 7 and 8
t
PHZ
/t
PLZ
3-state output disable time nOE
to nAn; nOE to nBn
see Figs 7 and 8
T
amb
=
40 to +125
°
C
t
PHL
/t
PLH
propagation delay nAn to nBn;
nBn to nAn
see Figs 6 and 8
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.0
1.0
1.5
1.0
1.5
1.5
6.0
6.0
8.5
7.0
8.5
7.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
PZH
/t
PZL
3-state output enable time nOE
to nAn; nOE to nBn
see Figs 7 and 8
t
PHZ
/t
PLZ
3-state output disable time nOE
to nAn; nOE to nBn
see Figs 7 and 8
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|---|---|
| VCH16373ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit D-type transparent latch with 5 Volt tolerant inputs/outputs 3-State |
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| VCH16374ADGG | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State |
| VCH16374ADL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs 3-State |
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