參數(shù)資料
型號(hào): V63C31322048
廠商: Mosel Vitelic, Corp.
英文描述: 64K X 32 CMOS Synchronous Burst Pipelined SRAM(64Kx32CMOS同步脈沖流水式SRAM)
中文描述: 64K的× 32的CMOS SRAM的同步突發(fā)流水線(64Kx32CMOS同步脈沖流水式的SRAM)
文件頁(yè)數(shù): 9/16頁(yè)
文件大?。?/td> 120K
代理商: V63C31322048
9
V63C31322048 Rev. 0.2 February 1999
MOSEL V ITELIC
V63C31322048
Notes:
1.
These parameters are sampled but not 100% tested.
2.
In the ZZ mode, the SRAM will enter a low-power state. In this mode, data retention is guaranteed and the clock is
active.
3.
ADSC and ADSP should not be accessed for at least 100 ns after chip leaves ZZ Mode.
20
t
KLZ
Clock to Output Low-Z
4
5
5
5
ns
1
21
t
KX
Clock to Output Invalid
2
2
2
2
ns
1
22
t
OE
Output Enable to Output Valid
5
6
7
8
ns
23
t
OHZ
Output Enable to Output High-Z
5
6
7
8
ns
1
24
t
OLZ
Output Enable to Output Low-Z
0
0
0
0
ns
1
26
t
ZZS
ZZ Standby Time
100
100
100
100
ns
2
27
t
ZZR
ZZ Recover Time
100
100
100
100
ns
3
#
Sym
Parameter
5
6
7
8
Unit
Note
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
AC Characteristics
(Cont’d)
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