參數(shù)資料
型號(hào): V62C31864
廠商: Mosel Vitelic, Corp.
英文描述: 2.7 VOLT 8K X 8 STATIC RAM
中文描述: 2.7伏8K的× 8靜態(tài)RAM
文件頁數(shù): 6/12頁
文件大?。?/td> 68K
代理商: V62C31864
6
V62C31864 Rev. 1.6 August 1998
MOSEL V ITELIC
V62C31864
AC Electrical Characteristics
(over all temperature ranges, V
CC
= 2.7V – 3.6V)
Read Cycle
Write Cycle
Parameter
Name
Parameter
-35
-70
Unit
Min.
Max.
Min.
Max.
t
RC
Read Cycle Time
35
70
ns
t
AA
Address Access Time
35
70
ns
t
ACS1
Chip Enable Access Time
35
70
ns
t
ACS2
Chip Enable Access Time
35
70
ns
t
OE
Output Enable to Output Valid
15
30
ns
t
CLZ1
Chip Enable to Output in Low Z
5
5
ns
t
CLZ2
Chip Enable to Output in Low Z
5
5
ns
t
OLZ
Output Enable to Output in Low Z
5
5
ns
t
CHZ
Chip Disable to Output in High Z
0
20
0
20
ns
t
OHZ
Output Disable to Output in High Z
0
20
0
20
ns
t
OH
Output Hold from Address Change
5
5
ns
Parameter
Name
Parameter
-35
-70
Unit
Min.
Max.
Min.
Max.
t
WC
Write Cycle Time
35
70
ns
t
CW1
Chip Enable to End of Write
35
70
ns
t
CW2
Chip Enable to End of Write
35
70
ns
t
AS
Address Setup Time
0
0
ns
t
AW
Address Valid to End of Write
35
70
ns
t
WP
Write Pulse Width
25
50
ns
t
WR
Write Recovery Time
0
0
ns
t
WHZ
Write to Output High-Z
0
20
0
25
ns
t
DW
Data Setup to End of Write
25
30
ns
t
DH
Data Hold from End of Write
0
0
ns
t
OW
Output Active from End of Write
5
5
ns
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