參數(shù)資料
型號(hào): V62C21164096
廠商: Mosel Vitelic, Corp.
英文描述: 256K x 16, 0.20 um CMOS STATIC RAM
中文描述: 256K × 16,0.20微米的CMOS靜態(tài)RAM
文件頁數(shù): 4/10頁
文件大?。?/td> 183K
代理商: V62C21164096
4
V62C21164096 Rev. 1.6 October 2001
MOSEL VITELIC
V62C21164096
DC Electrical Characteristics
(over all temperature ranges, V
CC
= 2.3V
3.0V)
NOTES:
1.
2.
3.
These are absolute values with respect to device ground and all overshoots due to system or tester noise are included.
V
IL
(Min.) = -3.0V for pulse width < 20ns.
Maximum values.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
V
IL
Input LOW Voltage
(1,2)
-0.3
0.4
V
V
IH
Input HIGH Voltage
(1)
2.0
V
CC
+ 0.3
V
I
IL
Input Leakage Current
V
CC
= Max, V
IN
= 0V to V
CC
-1
1
μ
A
I
OL
Output Leakage Current
V
CC
= Max, CE = V
IH
, V
OUT
= 0V to V
CC
-1
1
μ
A
V
OL
Output LOW Voltage
V
CC
= Min, I
OL
= 2.1mA
0.4
V
V
OH
Output HIGH Voltage
V
CC
= Min, I
OH
= -0.5mA
V
CC
0.4
V
Symbol
Parameter
Power
Com.
(3)
Ind.
(3)
Units
I
CC1
Average Operating Current, CE
1
= V
IL
, CE
2
= VCC
0.2V, Output Open,
V
CC
= Max.
f = fmax
35
40
mA
f = 1 MHz
4
5
I
SB
TTL Standby Current
CE
V
IH
, V
CC
= Max., f = 0
L
0.5
1
mA
LL
0.3
1
I
SB1
CMOS Standby Current, CE
1
V
CC
0.2V, CE
2
< 0.2V
V
IN
V
CC
0.2V or V
IN
0.2V, V
CC
= Max., f = 0
L
10
15
μ
A
LL
4
6
AC Test Conditions
AC Test Loads and Waveforms
Key to Switching Waveforms
Input Pulse Levels
0 to 2.0V
Input Rise and Fall Times
5 ns
Timing Reference Levels
1.1V
Output Load
see below
* Includes scope and jig capacitance
C
L
= 30 pF + 1 TTL Load
C
L
*
TTL
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
WILL BE
STEADY
MAY CHANGE
FROM H TO L
WILL BE
CHANGING
FROM H TO L
MAY CHANGE
FROM L TO H
WILL BE
CHANGING
FROM L TO H
DON'T CARE:
ANY CHANGE
PERMITTED
CHANGING:
STATE
UNKNOWN
DOES NOT
APPLY
CENTER
LINE IS HIGH
IMPEDANCE
OFF
STATE
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