參數(shù)資料
型號: V62C1884096LL-85BI
廠商: MOSEL-VITELIC
元件分類: SRAM
英文描述: 512K X 8 STANDARD SRAM, 85 ns, PBGA36
封裝: 8 X 10 MM, CSP, BGA-36
文件頁數(shù): 7/10頁
文件大?。?/td> 48K
代理商: V62C1884096LL-85BI
6
V62C1884096 Rev. 1.2 June 2000
MOSEL VITELIC
V62C1884096
AC Electrical Characteristics
(over all temperature ranges)
Read Cycle
Write Cycle
Parameter
Name
Parameter
85
100
Unit
Min.
Max.
Min.
Max.
tRC
Read Cycle Time
85
100
ns
tAA
Address Access Time
85
100
ns
tACS1
Chip Enable Access Time
85
100
ns
tACS2
Chip Enable Access Time
85
100
ns
tOE
Output Enable to Output Valid
85
40
ns
tCLZ1
Chip Enable to Output in Low Z
10
15
ns
tCLZ2
Chip Enable to Output in Low Z
10
15
ns
tOLZ
Output Enable to Output in Low Z
5
10
ns
tCHZ
Chip Disable to Output in High Z
30
35
ns
tOHZ
Output Disable to Output in High Z
30
35
ns
tOH
Output Hold from Address Change
10
10
ns
Parameter
Name
Parameter
85
100
Unit
Min.
Max.
Min.
Max.
tWC
Write Cycle Time
85
70
ns
tCW
Chip Enable to End of Write
70
60
ns
tAS
Address Setup Time
0
0
ns
tAW
Address Valid to End of Write
70
60
ns
tWP
Write Pulse Width
60
50
ns
tWR
Write Recovery Time
5
5
ns
tWHZ
Write to Output High-Z
25
30
ns
tDW
Data Setup to End of Write
40
45
ns
tDH
Data Hold from End of Write
0
0
ns
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