參數(shù)資料
型號(hào): V54C333322V
廠商: Mosel Vitelic, Corp.
英文描述: 200/183/166 MHz 3.3 VOLT ULTRA HIGH PERFORMANCE 1M X 32 SDRAM 2 BANKS X 512Kbit X 32
中文描述: 200/183/166 MHz的3.3伏超高性能100萬(wàn)× 32 SDRAM的2組X 512Kbit × 32
文件頁(yè)數(shù): 1/21頁(yè)
文件大小: 124K
代理商: V54C333322V
MOSEL VITELIC
1
V54C333322V
200/183/166 MHz 3.3 VOLT
ULTRA HIGH PERFORMANCE
1M X 32 SDRAM 2 BANKS X 512Kbit X 32
V54C333322V Rev. 2.0 May 2000
PRELIMINARY
V54C333322V
-5
-55
-6
Unit
Clock Frequency (t
CK
)
200
183
166
MHz
CAS Latency
3
3
3
clocks
Cycle Time (t
CK
)
5
5.5
6
ns
Access Time (t
AC
)
5
5.5
6
ns
Features
I
JEDEC Standard 3.3V Power Supply
I
The V54C333322V is ideally suited for high
performance graphics peripheral applications
I
Single Pulsed RAS Interface
I
Programmable CAS Latency: 2, 3
I
All Inputs are sampled at the positive going edge
of clock
I
Programmable Wrap Sequence: Sequential or
Interleave
I
Programmable Burst Length: 1, 2, 4, 8 and Full
Page for Sequential and 1, 2, 4, 8 for Interleave
I
DQM 0-3 for Byte Masking
I
Auto & Self Refresh
I
2K Refresh Cycles/32 ms
I
Burst Read with Single Write Operation
Description
The V54C333322V is a 33,554,432 bits synchro-
nous high data rate DRAM organized as 2 x
524,288 words by 32 bits. The device is designed to
comply with JEDEC standards set for synchronous
DRAM products, both electrically and mechanically.
Synchronous design allows precise cycle control
with the system clock. The CAS latency, burst
length and burst sequence must be programmed
into device prior to access operation.
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