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參數(shù)資料
| 型號(hào)： | V53C816H60 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 512K X 16 FAST PAGE MODE CMOS DYNAMIC RAM |
| 中文描述： | 為512k × 16快速頁(yè)面模式的CMOS動(dòng)態(tài)隨機(jī)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 1/18頁(yè) |
| 文件大?。?/td> | 213K |
| 代理商： | V53C816H60 |
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MOSEL V ITELIC
1
V53C816H
512K X 16 FAST PAGE MODE
CMOS DYNAMIC RAM
PRELIMINARY
V53C816H Rev. 1.3 February 1999
HIGH PERFORMANCE
40
45
50
60
Max. RAS Access Time, (t
RAC
)
40 ns
45 ns
50 ns
60 ns
Max. Column Address Access Time, (t
CAA
)
20 ns
22 ns
24 ns
30 ns
Min. Fast Page Mode Cycle Time, (t
PC
)
23 ns
25 ns
28 ns
35 ns
Min. Read/Write Cycle Time, (t
RC
)
75 ns
80 ns
90 ns
110 ns
Features
I
512K x 16-bit organization
I
RAS access time: 40, 45, 50, 60 ns
I
Fast Page Mode for a sustained data rate
of 43 MHz
I
Dual CAS Inputs
I
Pin-to-Pin compatible with 256Kx16
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh
I
Refresh Interval: 512 cycles/8 ms
I
Available in 40-pin 400 mil SOJ
I
Single +5V Power Supply
I
TTL Interface
Description
The V53C816H is a 524,288 x 16 bit high-perfor-
mance CMOS dynamic random access memory.
The V53C816H offers Fast Page mode with dual
CAS inputs. An address, CAS and RAS input ca-
pacitances are reduced to one half when the
256Kx16 DRAM is used to construct the same
memory density. The V53C816H has asymmetric
address, 10-bit row and 9-bit column.
All inputs are TTL compatible. Fast Page Mode
operation allows random access up to 512K x 16
bits, within a page, with cycle times as short as
23ns.
The V53C816H is best suited for graphics, and
buffer memory applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
K
40
45
50
60
Std.
0
°
C to 70
°
C
Blank
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