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參數(shù)資料
| 型號： | V370PDC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | High Performance PCI SDRAM Controller with Integrated Peripheral Control Unit |
| 中文描述： | 高性能PCI SDRAM控制器的集成了外圍控制單元 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大小： | 99K |
| 代理商： | V370PDC |
V370PDC
4
V370PDC_A0 Data Sheet Rev 1.01 DS-PD01-0101
Copyright 1999, V3 Semiconductor Inc.
CAS
O
12
Z
SDRAM Column Address Strobe
MWE
O
12
Z
SDRAM Memory Write Enable
MAD[31:0]
I/O
8
Z
SDRAM and peripheral bus data
DQM[3:0]
O
8
Z
SDRAM Data Mask (these act as MBE[3:0], A[1:0] for peripheral
access)
MARB_IN
I
Peripheral bus arbitration input: Treated as bus request input
when V370PDC is the primary bus master. When V370PDC is the
secondary bus master, this input acts as bus grant.
MARB_OUT
O
8
0
Peripheral bus arbitration output: Treated as bus grant output
when V370PDC is the primary bus master. When V370PDC is the
secondary bus master, this output acts bus request.
ALE
O
8
Z
Address Latch Enable: used to latch the address on MAD[31:0]
during the address phase of a peripheral bus access.
ADS
O
8
Z
Asserted low to indicate the beginning of a bus cycle.
BLAST
O
8
Z
Burst last.
READY
I
Data ready.
WNR
O
8
Z
Write/Read.
SDA
I/OD
Z
Serial EEPROM Data
SCL
O
2
Z
Serial EEPROM Clock
IOC[11:0]
I/O
8
Z
Multi-purpose I/O that can be configured for many functions
INT[3:0]
I/O
8
Z
General purpose interrupt inputs/outputs: may be used for either
PCI or local processor interrupts
Mode and Reset
Signal
Type
R
Description
RSTIN
I
Reset Input: Active low reset input used to initialize all internal
functions of the chip.
RSTOUT
O
8
0
Reset Output: Driven active when the input reset is driven active.
Driven inactive when the RSTOUT bit in the system register is set.
The RSTOUT signal is synchronous to the rising edge of CLKIN.
CH
I
PCI Precharge Bias: This signal is driven low to activate the on-
chip precharge bias for use in PICMG Hot Swap applications.
Non-Hot Swap applications should pull this signal high.
Table 3: Signal Descriptions (cont’d)
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| V370PDC-66 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
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