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參數(shù)資料
| 型號： | UTC4053 |
| 廠商： | 友順科技股份有限公司 |
| 英文描述： | ANALOG MULTIPLEXERS/ DEMULTIPLEXERS |
| 中文描述： | 模擬多路復(fù)用器/解復(fù)用器 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 145K |
| 代理商： | UTC4053 |
UTC 4053 CMOS IC
ELECTRICAL CHARACTERISTICS*
UTC
UNISONIC TECHNOLOGIES CO., LTD.
4
www.unisonic.com.tw
QW-R502-036,A
(C
L
= 50pF, T
a
=25
℃
, V
EE
≦
V
SS
, unless otherwise indicated.)
PARAMETER
SYMBOL V
DD
– V
EE
Vdc
Propagation Delay Times
(Figure 4) Switch Input to
Switch Output (R
L
= 10 k
)
TEST CONDITIONS
t
PLH
, t
PHL
= (0.17 ns/pF) C
L
+ 16.5 ns
t
PLH
, t
PHL
= (0.08 ns/pF) C
L
+ 4.0 ns
t
PLH
, t
PHL
= (0.06 ns/pF) C
L
+ 3.0 ns
(R
L
=10k
, V
EE
=V
SS
)Output “1” or “0”
to High Impedance, or High
Impedance to “1” or “0” Level
MIN TYP# MAX UNIT
25
8.0
6.0
275
140
110
300
120
80
0.07
17
t
PLH,
t
PHL
5.0
10
15
5.0
10
15
5.0
10
15
10
65
20
15
550
280
220
600
240
160
ns
Inhibit to Output
t
PHZ,
t
PLZ
t
PZH,
t
PZL
ns
Control Input to Output
t
PLH,
t
PHL
R
L
= 10 k
, V
EE
= V
SS
ns
Second Harmonic Distortion
R
L
= 10K
, f = 1 kHz, Vin = 5 V
PP
R
L
= 1k
, Vin = 1/2 (V
DD
–V
EE
) p–p,
C
L
= 50pF, 20 Log (Vout/Vin) = -3dB)
R
L
= 1K
, Vin = 1/2 (V
DD
– V
EE
) p–p
fin = 55 MHz
R
L
= 1 k
, Vin = 1/2 (V
DD
–V
EE
) p–p
fin = 3.0 MHz
R
1
= 1 k
, R
L
= 10 k
Control
t
TLH
= t
THL
= 20 ns, Inhibit = V
SS
)
%
Bandwidth (Figure 5)
BW
10
MHz
Off Channel Feedthrough
Attenuation (Figure 5)
Channel Separation
(Figure 6)
Crosstalk, Control Input to
Common O/I (Figure 7)
* The formulas given are for the typical characteristics only at 25
℃
.
# Data labelled “Typ” is not lo be used for design purposes but In intended as an indication of the IC’s potential
performance.
10
-50
dB
10
-50
dB
10
75
mV
V
DD
V
EE
V
EE
V
DD
V
DD
V
DD
OUT/IN
OUT/IN
IN/OUT
CONTROL
IN/OUT
LEVEL
CONVERTED
CONTROL
Figure 1. Switch Circuit Schematic
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