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參數(shù)資料
| 型號： | UT22VP10C-20PCA |
| 英文描述： | MD516 DDP 32Gb x8 1.8V TSOP |
| 中文描述： | 保險絲，可編程的PLD |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 287K |
| 代理商： | UT22VP10C-20PCA |
4
OUTPUT POLARITY
Each macrocell can be configured to implement Active-High
or Active-Low logic. Programmable polarity eliminates the
need for external inverters.
OUTPUT ENABLE
The output of each I/O macrocell can be enabled or disabled
under the control a programmable output enable product term.
The output signal is propagated to the I/O pin when the logical
conditions programmed on the output enable term are satisfied.
Otherwise, the output buffer is driven to the high-impedance
state.
The output enable term allows the I/O pin to function as a ded-
icated input, dedicated output, or bidirectional I/O. When every
connection is unprogrammed, the output enable product term
permanently enables the output buffer and yields a dedicated
output. If every connection is programmed, the enable term is
logically low and the I/O functions as a dedicated input.
REGISTER FEEDBACK
The feedback signal to the AND array is taken from the Q output
when the I/O macrocell implements a registered function
(C
2
= 0, C
1
= 0).
BIDIRECTIONAL I/O
The feedback signal is taken from the I/O pin when the macro-
cell implements a combinatorial function (C
1
= 1) or a regis-
tered function (C
2
= 1, C
1
= 0). In this case, the pin can be used
as a dedicated input, a dedicated output, or a bidirectional I/O.
POWER-ON RESET
To ease system initialization, all D flip-flops will power-up to
a reset condition and the Q output will be low. The actual output
of the UT22VP10 will depend on the programmed output po-
larity. The reset delay time is 5
μ
s maximum. See the Power-up
Reset section for a more descriptive list of POR requirements.
ANTI-FUSE SECURITY
The UT22VP10 provides a security bit that prevents unautho-
rized reading or copying of designs programmed into the de-
vice. The security bit is set by the PLD programmer at the con-
clusion of the programming cycle. Once the security bit is set
it is no longer possible to verify (read) or program the
UT22VP10.
NOTE:
UTMC does not recommend using the
UT22VP10 unless the security fuse has been programmed.
The security bit must be blown to ensure proper function-
ality of the UT22VP10.
C
1
C
0
AR
C
2
SP
D
Q
CK
Q
C
1
C
0
OUTPUT
SELECT
MUX
INPUT/
FEEDBACK
MUX
C
1
Figure 2. Macrocell
C
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UT22VP10C-20PCC | MD516 QDP 64Gb x8 1.8V TSOP |
| UT22VP10C-20PCX | MD516 SDP 16Gb x8 1.8V TSOP |
| UT22VP10C-20UCA | MD516 SDP 16Gb x8 1.8V TSOP |
| UT22VP10C-20UCC | MD78 SDP 08Gb x8 1.8V TSOP |
| UT22VP10C-20UCX | Fuse-Programmable PLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UT22VP10C-20PCC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fuse-Programmable PLD |
| UT22VP10C-20PCX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fuse-Programmable PLD |
| UT22VP10C-20UCA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fuse-Programmable PLD |
| UT22VP10C-20UCC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fuse-Programmable PLD |
| UT22VP10C-20UCX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Fuse-Programmable PLD |
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