參數(shù)資料
型號(hào): USB1101
廠商: Fairchild Semiconductor Corporation
英文描述: USB 2.0 FS Peripheral Transceiver
中文描述: 財(cái)政司司長(zhǎng)外設(shè)的USB 2.0收發(fā)器
文件頁(yè)數(shù): 2/10頁(yè)
文件大?。?/td> 445K
代理商: USB1101
Preliminary
www.fairchildsemi.com
2
U
Pin Description
Note 1:
OE
H
Note 2:
OE
L
Functional Description
The USB1101 transceiver is designed as an Upstream fac-
ing port device to convert CMOS data into USB differential
bus signal levels and to convert USB differential bus signal
to CMOS data. If you wish to use these as downstream
devices, Config must be hard-wired to GND.
To minimize EMI and noise the outputs are edge rate con-
trolled with the rise and fall times controlled and defined for
full speed data rates only (12Mbits/s). The rise and fall
times are balanced between the differential pins to mini-
mize skew.
The USB1101 supports the DAT_VP/SE0_VM format from
the OTG Transceiver Specification using the DAT_SE0
Mode. Table 1 describes the specific pin functionality selec-
tion and Table 2 describes the specific Truth Tables for
Driver, Receiver, and Suspended operating functions.
The USB1101 has the capability of serving Self Powered
power supply configurations only but interfaces to mixed
voltage supply applications.
TABLE 1. Function Select
Note 3:
Signal levels is function of connection, Config and/or pull-up/pull-down resistors.
Note 4:
For Suspnd
HIGH mode the differential receiver is inactive.
Pin Number
1
Pin Name
Config
I/O
I
Pin Description
USB connect or disconnect software control input. Configures 3.3V to
internal 1.5k
:
resistor on D when HIGH. If device is used as Downstream
port then this pin is hard-wired to GND.
2
OE
I
Output Enable (active LOW)
When OE
L transmit mode is enabled
When OE
H receive mode (CMOS level is relative to V
CCIO
) is enabled.
When in transmit mode
(Note 2)
DAT_VP is a single-ended host data input
(CMOS level relative to V
CCIO
).
When in receive mode
and Suspnd
L DAT_VP is a single ended
data output comprised of the differential input data from the D /D inputs
(see Table 2);
When in receive mode
(Note 1)
with Suspnd
H DAT_VP outputs the D
data.
(see Table 1 and Table 2) Output drive is 2mA (min) buffer
When in transmit mode
(Note 2)
SE0_VM is a data input (CMOS level rela-
tive to V
).
When in receive mode
(Note 1)
and Suspnd
L, SE0_VM is used as an out-
put (see Table 2)
(see Table 1 and Table 2). Output drive is 4ma (min) buffer
GND
Enables a low power state (CMOS level is relative to V
).
In receive mode
with Suspnd
L the DAT_VP pin will be a function
of the D /D lines.
In receive mode
with Suspnd
H DAT_VP will have the value of D
such that the device can still monitor out-of-suspend signaling.
Data , Data . Differential data bus conforming to the USB standard
Supply Voltage for host side digital I/O pins (1.65V to 3.6V)
Supply Voltage Input (3.0V to 3.6V)
3
DAT_VP
I/O
4
SE0_VM
I/O
5
6
GND
Suspnd
GND
I
7, 8
9
10
D , D
V
CCIO
V
CC
AI/O
Pwr
Pwr
Suspnd
L
L
H
H
OE
L
H
L
H
D , D
Transmitting
Receiving (Note 3)
Transmitting (Note 4)
Driver is 3-STATE
(Note 4)
DAT_VP
Host Data Input
D , D Diff Output
Host Data Input
DAT_VP Output
SE0_VM
Function
Normal Driving
Receiving
Driving while Suspended
Suspended
(Internal Low Power Mode)
SE0_VM Host Input
SE0_VM Output
SE0_VM Host Input
SE0_VM Output
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