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LIST OF FIGURES (2/2)
Figure No.
Title
Page
13-1
13-2
13-3
13-4
13-5
13-6
13-7
13-8
13-9
13-10
13-11
13-12
13-13
Configuration of the 8-bit Timer Counter ...............................................................................
Timer Mode Register.............................................................................................................
Setting the Count Value in a Modulo Register.......................................................................
Error in Zero-Clearing the Count Registe during Counting ....................................................
Error in Starting Counting from the Count Halt State ............................................................
Reading 8-Bit Counter Count Values .....................................................................................
Timer Output Control Mode Register ....................................................................................
Configuration of Comparator .................................................................................................
Comparator Input Channel Selection Register.......................................................................
Reference Voltage Selection Register ...................................................................................
Comparator Operation Control Register ................................................................................
Block Diagram of the Serial Interface ....................................................................................
Timing of 8-Bit Transmission and Reception Mode
(Simultaneous Transmission Reception)................................................................................
Timing of the 8-Bit Reception Mode .....................................................................................
Serial Interface Control Register............................................................................................
Setting a Value in the Shift Register ......................................................................................
Reading a Value from the Shift Register................................................................................
118
119
122
124
125
127
129
131
133
133
134
136
137
138
139
141
142
13-14
13-15
13-16
13-17
14-1
14-2
14-3
14-4
Interrupt Control Register ......................................................................................................
Interrupt Handling Procedure.................................................................................................
Return from Interrupt Handling..............................................................................................
Interrupt Acceptance Timing Chart (when INTE=1 and IP
×××
=1) .........................................
148
153
154
155
15-1
15-2
Cancellation of HALT Mode...................................................................................................
Cancellation of STOP Mode...................................................................................................
164
168
16-1
16-2
16-3
16-4
16-5
Reset Block Configuration .....................................................................................................
Resetting ...............................................................................................................................
Example of the Power-On Reset Operation ..........................................................................
Example of the Power-Down Reset Operation .....................................................................
Example of Reset Operation during the Period from Power-Down Reset to
Power Recovery ....................................................................................................................
172
172
175
177
178
17-1
17-2
19-1
19-2
Procedure of program Memory Writing.................................................................................
Procedure of Program Memory Reading ...............................................................................
Configuration of Control Register (
μ
PD17120, 17121) ..........................................................
Configuration of Control Register (
μ
PD17132, 17133, 17P132, 17P133)..............................
182
183
258
264
C-1
C-2
Externally Installed System Clock Oscillation Circuit .............................................................
Unsatisfactory Oscillation Circuit Examples ..........................................................................
271
272