參數(shù)資料
型號(hào): UPSD3254B-40U6T
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
中文描述: 閃存可編程系統(tǒng)設(shè)備與8032微控制器核心和256Kbit的SRAM
文件頁數(shù): 135/176頁
文件大?。?/td> 1214K
代理商: UPSD3254B-40U6T
135/176
μPSD325X DEVICES
External Chip Select
The CPLD also provides two External Chip Select
(ECS1-ECS2) outputs on Port D pins that can be
used to select external devices. Each External
Chip Select (ECS1-ECS2) consists of one product
term that can be configured active High or Low.
The output enable of the pin is controlled by either
the output enable product term or the Direction
Register. (See Figure 68.)
Figure 68. Port D External Chip Select Signals
P
POLARITY
BIT
PD2 PIN
PT2
ECS2
DIRECTION
REGISTER
ENABLE (.OE)
POLARITY
BIT
PD1 PIN
PT1
ECS1
ENABLE (.OE)
DIRECTION
REGISTER
C
AI06607
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