參數(shù)資料
型號: UPSD3254A
廠商: 意法半導體
英文描述: Flash Programmable System Devices with 8032 Microcontroller Core
中文描述: 閃存可編程系統(tǒng)設(shè)備與8032微控制器內(nèi)核
文件頁數(shù): 1/175頁
文件大?。?/td> 1731K
代理商: UPSD3254A
1/175
September 2003
Rev. 1.2
UPSD3254A, UPSD3254BV
UPSD3253B, UPSD3253BV
Flash Programmable System Devices
with 8032 Microcontroller Core
FEATURES SUMMARY
I
The uPSD325X devices combine a Flash PSD
architecture with an 8032 microcontroller core.
The uPSD325X devices of Flash PSDs feature
dual banks of Flash memory, SRAM, general
purpose I/O and programmable logic, supervi-
sory functions and access via USB, I
2
C, ADC,
DDC and PWM channels, and an on-board
8032 microcontroller core, with two UARTs,
three 16-bit Timer/Counters and two External
Interrupts. As with other Flash PSD families, the
uPSD325X devices are also in-system pro-
grammable (ISP) via a JTAG ISP interface.
I
Large 32KByte SRAM with battery back-up
option
I
Dual bank Flash memories
– 128KByte or 256KByte main Flash memory
– 32KByte secondary Flash memory
I
Content Security
– Block access to Flash memory
I
Programmable Decode PLD for flexible address
mapping of all memories within 8032 space.
I
High-speed clock standard 8032 core (12-cycle)
I
USB Interface (some devices only)
I
I
2
C interface for peripheral connections
I
5 Pulse Width Modulator (PWM) channels
I
Analog-to-Digital Converter (ADC)
I
Standalone Display Data Channel (DDC)
I
Six I/O ports with up to 46 I/O pins
I
3000 gate PLD with 16 macrocells
I
Supervisor functions with Watchdog Timer
I
In-System Programming (ISP) via JTAG
I
Zero-Power Technology
I
Single Supply Voltage
– 4.5 to 5.5V
– 3.0 to 3.6V
Figure 1. 52-lead, Thin, Quad, Flat Package
Figure 2. 80-lead, Thin, Quad, Flat Package
TQFP52 (T)
TQFP80 (U)
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相關(guān)代理商/技術(shù)參數(shù)
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