參數(shù)資料
型號(hào): UPSD3212AV-40U6T
廠商: 意法半導(dǎo)體
英文描述: Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic
中文描述: 閃存可編程系統(tǒng)設(shè)備與8032具有USB和可編程邏輯控制器
文件頁數(shù): 132/163頁
文件大?。?/td> 2844K
代理商: UPSD3212AV-40U6T
uPSD3212A, uPSD3212C, uPSD3212CV
132/163
LU.
3 complementary static tests are required on
10 parts to assess the latch-up performance. A
supply overvoltage (applied to each power supply
pin) and a current injection (applied to each input,
output, and configurable I/O pin) are performed on
each sample. This test conforms to the EIA/JESD
78 IC Latch-up Standard (see Table
108
). For
more details, refer to the Application Note,
AN1181.
DLU.
Electro-static discharges (one positive then
one negative test) are applied to each pin of 3
samples when the micro is running to assess the
latch-up performance in dynamic mode. Power
supplies are set to the typical values, the oscillator
is connected as near as possible to the pins of the
micro, and the component is put in reset mode.
This test conforms to the IEC 1000-4-2 and
SAEJ1752/3 Standards (see Table
108
). For more
details, refer to the Application Note, AN1181.
Table 108. Latch-up and Dynamic Latch-up Electrical Sensitivities
Note: 1. Class description: A Class is an STMicroelectronics internal specification. All of its limits are higher than the JEDEC specifications.
This means when a device belongs to “Class A,” it exceeds the JEDEC standard. “Class B” strictly covers all of the JEDEC criteria
(International standards).
Symbol
Parameter
Conditions
Level/
Class
(1)
LU
Static Latch-up Class
T
A
= 25°C
A
DLU
Dynamic Latch-up Class
V
DD
= 5V; T
A
= 25°C; f
OSC
= 40MHz
A
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