參數(shù)資料
型號(hào)： UPD78P4038YGC
廠商： NEC Corp.
英文描述： RECTIFIER BRIDGE 1.5A 800V 40A-ifsm 1.1V-vf 5uA-ir KBP 35/TUBE
中文描述： 16/8-BIT單片機(jī)
文件頁(yè)數(shù)： 35/72頁(yè)
文件大?。?/td> 435K
代理商： UPD78P4038YGC
μ
PD78P4038Y
35
AC CHARACTERISTICS
(T
A
= –40 to +85
°
C, V
DD
= AV
DD
= +2.7 to 5.5 V, V
SS
= AV
SS
= 0 V)
(1) Read/write operation (1/2)
Remarks
T:
t
CYK
(system clock cycle time)
1 (during address wait), otherwise, 0
Number of wait states (n
≥
0)
a:
n:
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Parameter
Address setup time
ASTB high-level width
Address hold time (to ASTB
↓
)
Address hold time (to RD
↑
)
Delay from address to RD
↓
Address float time (to RD
↓
)
Delay from address to data input
Delay from ASTB
↓
to data input
Delay from RD
↓
to data input
Delay from ASTB
↓
to RD
↓
Data hold time (to RD
↑
)
Delay from RD
↑
to address active
Delay from RD
↑
to ASTB
↑
RD low-level width
Address hold time (to WR
↑
)
Delay from address to WR
↓
Delay from ASTB
↓
to data output
Delay from WR
↓
to data output
Delay from ASTB
↓
to WR
↓
Symbol
t
SAST
t
WSTH
t
HSTLA
t
HRA
t
DAR
t
FRA
t
DAID
t
DSTID
t
DRID
t
DSTR
t
HRID
t
DRA
t
DRST
t
WRL
t
HWA
t
DAW
t
DSTOD
t
DWOD
t
DSTW
MIN.
(0.5 + a) T – 15
(0.5 + a) T – 31
(0.5 + a) T – 17
(0.5 + a) T – 40
0.5T – 24
0.5T – 34
0.5T – 14
(1 + a) T – 9
(1 + a) T – 15
0.5T – 9
0
0.5T – 8
0.5T – 12
1.5T – 8
1.5T – 12
0.5T – 17
(1.5 + n) T – 30
(1.5 + n) T – 40
0.5T – 14
(1 + a) T – 5
(1 + a) T – 15
0.5T – 9
MAX.
0
(2.5 + a + n) T – 37
(2.5 + a + n) T – 52
(2 + n) T – 40
(2 + n) T – 60
(1.5 + n) T – 50
(1.5 + n) T – 70
0.5T + 19
0.5T + 35
0.5T – 11
After program
is read
After data is
read
Conditions
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
V
DD
= +5.0 V
±
10%
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