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參數(shù)資料
| 型號： | UPD78F0034AY |
| 廠商： | NEC Corp. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash |
| 中文描述： | 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存 |
| 文件頁數(shù)： | 38/66頁 |
| 文件大?。?/td> | 565K |
| 代理商： | UPD78F0034AY |
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μ
PD78F0034A, 78F0034AY
38
Data Sheet U14040EJ4V0DS
(f)
I
2
C bus Mode (
μ
PD78F0034AY only)
Parameter
Symbol
Standard Mode
High-Speed Mode
Unit
MIN.
MAX.
MIN.
MAX.
SCL0 clock frequency
f
CLK
0
100
0
400
kHz
Bus free time
(between stop and start condition)
t
BUF
4.7
–
1.3
–
μ
s
Hold time
Note 1
t
HD:STA
4.0
–
0.6
–
μ
s
SCL0 clock low-level width
t
LOW
4.7
–
1.3
–
μ
s
SCL0 clock high-level width
t
HIGH
4.0
–
0.6
–
μ
s
Start/restart condition setup time
t
SU:STA
4.7
–
0.6
–
μ
s
Data hold time
CBUS compatible master
t
HD:DAT
5.0
–
–
–
μ
s
I
2
C bus
0
Note 2
–
0
Note 2
0.9
Note 3
μ
s
Data setup time
t
SU:DAT
250
–
100
Note 4
–
ns
SDA0 and SCL0 signal rise time
t
R
–
1,000
20 + 0.1Cb
Note 5
300
ns
SDA0 and SCL0 signal fall time
t
F
–
300
20 + 0.1Cb
Note 5
300
ns
Stop condition setup time
t
SU:STO
4.0
–
0.6
–
μ
s
Spike pulse width controlled by input filter
t
SP
–
–
0
50
ns
Capacitive load per each bus line
Cb
–
400
–
400
pF
Notes 1.
In the start condition, the first clock pulse is generated after this hold time.
2.
To fill in the undefined area of the SCL0 falling edge, it is necessary for the device to internally provide
at least 300 ns of hold time for the SDA0 signal (which is V
IHmin.
of the SCL0 signal).
3.
If the device does not extend the SCL0 signal low hold time (t
LOW
), only maximum data hold time t
HD:DAT
needs to be fulfilled.
4.
The high-speed mode I
2
C bus is available in a standard mode I
2
C bus system. At this time, the
conditions described below must be satisfied.
If the device does not extend the SCL0 signal low state hold time
t
SU:DAT
≥
250 ns
If the device extends the SCL0 signal low state hold time
Be sure to transmit the next data bit to the SDA0 line before the SCL0 line is released (t
Rmax.
+ t
SU:DAT
= 1,000 + 250 = 1,250 ns by standard mode I
2
C bus specification).
5.
Cb: Total capacitance per one bus line (unit: pF)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD78F0034AYGB-8EU-A | 制造商:Renesas Electronics Corporation 功能描述: 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K 78K0 CISC 32KB Flash 5V 64-Pin LQFP |
| UPD78F0034AYGC-8BS | 制造商:NEC Electronics Corporation 功能描述:MicroController, 8-Bit, 64 Pin, Plastic, QFP |
| UPD78F0034AYGC-8BS-A | 制造商:Renesas Electronics Corporation 功能描述: 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K0 CISC 32KB Flash 5V 64-Pin LQFP |
| UPD78F0034AYGK-9ET-A | 制造商:Renesas Electronics Corporation 功能描述: 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K CISC 32KB Flash 5V 64-Pin TQFP |
| UPD78F0034BGB-8EU-A | 制造商:Renesas Electronics Corporation 功能描述: 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP Cut Tape 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP |
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