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63
μ
PD784224, 784225, 784224Y, 784225Y
Data Sheet U12376EJ1V0DS00
Main System Clock Oscillator Characteristics (T
A
=
40
°
C to +85
°
C, V
DD
= V
DD0
= V
DD1
)
Resonator Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
Oscillation frequency (f
X
)
4.5 V
≤
V
DD
≤
5.5 V
2
12.5
MHz
resonator
2.7 V
≤
V
DD
< 4.5 V
2
6.25
or crystal
2.0 V
≤
V
DD
< 2.7 V
2
3.125
resonator
1.8 V
≤
V
DD
< 2.0 V
2
2
External
clock
X1 input frequency (f
X
)
4.5 V
≤
V
DD
≤
5.5 V
2
12.5
MHz
2.7 V
≤
V
DD
< 4.5 V
2
6.25
2.0 V
≤
V
DD
< 2.7 V
2
3.125
1.8 V
≤
V
DD
< 2.0 V
2
2
X1 input high-/low-
level width (t
WXH
, t
WXL
)
15
250
ns
X1 input rising/falling
time (t
XR
, t
XF
)
4.5 V
≤
V
DD
≤
5.5 V
0
5
ns
2.7 V
≤
V
DD
< 4.5 V
0
10
2.0 V
≤
V
DD
< 2.7 V
0
20
1.8 V
≤
V
DD
< 2.0 V
0
30
Cautions 1.
When using the main system clock oscillator, wire as follows in the area enclosed by the
broken lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor the same potential as V
SS
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2.
When the main system clock is stopped and the device is operating on the subsystem clock,
wait until the oscillation stabilization time has been secured by the program before switching
back to the main system clock.
Remark
For the resonator selection and oscillator constant, customers are required to either evaluate the
oscillation themselves or apply to the resonator manufacturer for evaluation.
X2
X1 V
SS
X2
X1
PD74HCU04
μ