
5
μ
PD78361A, 78362A
125 ns (internal clock: 16 MHz, external clock: 8 MHz)
32K bytes
24K bytes
2K bytes
768 bytes
64K bytes
8 bits
×
16
×
8 banks
115
16-bit transfer/operation
Multiplication/division (16 bits
×
16 bits, 32 bits
÷
16 bits)
Bit manipulation
String
Sum-of-products operation (16 bits
×
16 bits + 32 bits)
Relative operation
14 (of which 8 are shared with analog input)
38
16-bit timer
×
1
10-bit dead time timer
×
3
16-bit compare register
×
4
2 kinds of output mode can be selected
Mode 0, set-reset output: 6 channels
Mode 1, buffer output: 6 channels
16-bit timer
×
1
16-bit compare register
×
1
16-bit timer
×
1
16-bit capture register
×
1
16-bit capture/compare register
×
1
16-bit timer
×
1
16-bit capture register
×
2
16-bit capture/compare register
×
1
16-bit timer
×
1
16-bit compare register
×
2
16-bit resolution PWM output: 1 channel
Pulse outputs associated with real-time pulse unit: 4 lines
8-/9-/10-/12-bit resolution variable PWM output: 2 channels
10-bit resolution, 8 channels
Dedicated baud rate generator
UART:
Clocked serial interface/SBI: 1 channel
1 channel
External: 6, internal: 14 (of which 2 are multiplexed with external)
4 priority levels can be specified through software
3 types of interrupt service modes selectable
(vectored interrupt, macro service, and context switching)
64-pin plastic shrink DIP (750 mil)
Watchdog timer
Standby function (HALT and STOP modes)
PLL control circuit
FUNCTIONAL OUTLINE
Minimum instruction execution
time
Internal memory
ROM
RAM
Memory space
General-purpose registers
Number of basic instructions
Instruction set
I/O lines
Input
I/O
Real-time pulse unit
Real-time output port
PWM unit
A/D converter
Serial interface
Interrupt function
Package
Others
μ
PD78361A
Item
μ
PD78362A