參數(shù)資料
型號： UPD78323
廠商： NEC Corp.
英文描述： 16/8-BIT SINGLE-CHIP MICROCONTROLLER
中文描述： 16/8-BIT單片機
文件頁數(shù)： 58/86頁
文件大小： 454K
代理商： UPD78323
58
μ
PD78323, 78324
Flags
Mnemonic
B
Operation
S
Z
AC P/V CY
Operand
CALL
CALLF
CALLT
CALL
BRK
RET
RETB
RETI
PUSH
PUSHU
POP
POPU
MOVW
INCW
DECW
CHKL
CHKLA
(SP–1)
←
(PC+3)
H
, (SP–2)
←
(PC+3)
L
,
PC
←
addr16, SP
←
SP–2
(SP–1)
←
(PC+2)
H
, (SP–2)
←
(PC+2)
L
,
PC
15–11
←
00001, PC
10–0
←
addr11,SP
←
SP–2
(SP–1)
←
(PC+1)
H
, (SP–2)
←
(PC+1)
L
,
PC
H
←
(TPF, 00000000, addr5+1),
PC
L
←
(TPF, 00000000, addr5), SP
←
SP–2
(SP–1)
←
(PC+2)
H
, (SP–2)
←
(PC+2)
L
,
PC
H
←
rp1
H
, PC
L
←
rp1
L
, SP
←
SP–2
(SP–1)
←
(PC+2)
H
, (SP–2)
←
(PC+2)
L
,
PC
H
←
(rp1+1), PC
L
←
(rp1), SP
←
SP–2
(SP–1)
←
PSW
H
, (SP–2)
←
PSW
L
(SP–3)
←
(PC+1)
H
, (SP–4)
←
(PC+1)
L
,
PC
L
←
(003EH), PC
H
←
(003FH), SP
←
SP–4
IE
←
0
PC
L
←
(SP), PC
H
←
(SP+1), SP
←
SP+2
PC
L
←
(SP), PC
H
←
(SP+1)
PSW
L
←
(SP+2),
PSW
H
←
(SP+3)
SP
←
SP+4
PC
L
←
(SP), PC
H
←
(SP+1)
PSW
L
←
(SP+2),
PSW
H
←
(SP+3)
SP
←
SP+4
(SP–1)
←
sfr
H
(SP–2)
←
sfr
L
SP
←
SP–2
{(SP–1)
←
post
H
, (SP–2)
←
post
L
,SP
←
SP–2}
×
n times
Note
(SP–1)
←
PSW
H
, (SP–2)
←
PSW
L
, SP
←
SP–2
{(UP–1)
←
post
H
, (UP–2)
←
post
L
, UP
←
UP–2}
×
n times
Note
sfr
L
←
(SP)
sfr
H
←
(SP+1)
SP
←
SP+2
{post
L
←
(SP), post
H
←
(SP+1), SP
←
SP+2}
×
n times
Note
PSW
L
←
(SP), PSW
H
←
(SP+1), SP
←
SP+2
{post
L
←
(UP), post
H
←
(UP+1), UP
←
UP+2}
×
n times
Note
SP
←
word
SP
←
AX
AX
←
SP
SP
←
SP+1
SP
←
SP–1
(pin level)
∨
(signal level before output
buffer)
A
←
(pin level)
∨
(signal level before output
buffer)
!addr16
!addr11
[addr5]
rp1
[rp1]
sfrp
post
PSW
post
sfrp
post
PSW
post
SP, #word
SP, AX
AX, SP
SP
SP
sfr
sfr
Note
n indicates the number of registers described as post.
3
2
1
2
2
1
1
1
1
3
2
1
2
3
2
1
2
4
2
2
2
2
3
3
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
×
×
P
×
×
P
I
G
S
C
S
相關PDF資料
PDF描述
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