
59
Chapter 3
CPU Architecture
User’s Manual U16504EE1V1UD00
Figure 3-6:
Data Memory Addressing of μPD780826A
Note:
In the expansion RAM between F600H and F7DFH it is
not
possible to do code execution.
FFFFH
FF00H
FEFFH
FA80H
FA7FH
FEE0H
FEDFH
C000H
BFFFH
0000H
LCD Display RAM
28 x 4 bits
Expansion RAM
480 x 8 bits
(shared with DCAN)
Special Function Register
(SFR) 256 x 8 bits
General Registers
32 x 8 bits
Internal High-speed RAM
1024 x 8 bits
Internal Mask ROM
49152 x 8 bits
Not usable
Not usable
Not usable
FF20H
FF1FH
FE20H
FA64H
FA63H
FB00H
FAFFH
F7E0H
F7DFH
F600H
F5FFH
SFR Addressing
Register Addressing
Short Direct
Addressing
Direct
Addressing
Register
Indirect
Addressing
Based
Addressing
Based
Indexed
Addressing