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Chapter 11
Clock Output Control Circuit
User’s Manual U16504EE1V1UD00
11.2 Clock Output Control Circuit Configuration
The clock output control circuit consists of the following hardware.
Figure 11-2:
Clock Output Control Circuit Block Diagram
Table 11-1:
Clock Output Control Circuit Configuration
Item
Configuration
Control register
Clock output selection register (CKS)
Port mode register 6 (PM6)
Internal Bus
f
X
f
X
/2
f
X
/2
2
f
X
/2
3
f
X
/2
4
f
X
/2
5
f
X
/2
6
f
X
/2
7
CLOE CCS2 CCS1 CCS0
P61
Output Latch
Synchronizing
Circuit
4
PM61
S
Clock Output Selection Register
Port Mode Register 6
PCL/P61/SGOA