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參數(shù)資料
| 型號(hào)： | UPD78058FY |
| 廠商： | NEC Corp. |
| 元件分類(lèi)： | 8位微控制器 |
| 英文描述： | 8-bit single-chip microcontroller |
| 中文描述： | 8位單片機(jī) |
| 文件頁(yè)數(shù)： | 38/72頁(yè) |
| 文件大?。?/td> | 510K |
| 代理商： | UPD78058FY |
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38
m
PD78042F, 78043F, 78044F, 78045F
MAIN SYSTEM CLOCK OSCILLATOR CHARACTERISTICS
(T
A
= –40 to +85 °C, V
DD
= 2.7 to 5.5 V)
Notes 1.
It indicates only the oscillator characteristics. For the instruction execution time, see the AC Charac-
teristics.
2.
Time required until oscillation becomes stable after V
DD
is applied or the STOP mode is disabled.
Cautions 1. If the main system clock oscillator is to be used, wire the area inside the broken line square
as follows to avoid influence of wiring capacitance:
Make wiring as short as possible.
Do not cross other signal lines.
Do not get close to lines with fluctuating large current.
Make sure that the connecting points of the capacitor of the oscillator always have the same
electric potential as V
SS
.
Do not connect the oscillator to a ground pattern that conducts a large current.
Do not take out signal from the oscillator.
2. When switching to the main system clock again after the subsystem clock has been used with
the main system clock stopped, be sure to set the program to provide enough time for the
oscillation to stabilize.
Resonator
Recommended circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
resonator
Oscillation frequency
(f
X
)
Note 1
1
5
MHz
Oscillation settling
time
Note 2
4
ms
Crystal
Oscillation frequency
(f
X
)
Note 1
1
4.19
5
MHz
Oscillation settling
time
Note 2
V
DD
= 4.5 to 5.5 V
10
ms
30
External
clock
X1 input frequency
(f
X
)
Note 1
1
5
MHz
X1 input high, low-level
width (t
XH
, t
XL
)
100
500
ns
X1
X2
PD74HCU04
μ
V
SS
X1
X2
C2
C1
V
SS
X1
X2
C2
C1
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