參數(shù)資料
型號(hào): UPD78053GC-XXX-8BT
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80
封裝: 14 X 14 MM, 1.40 MM PITCH, PLASTIC, QFP-80
文件頁(yè)數(shù): 124/237頁(yè)
文件大?。?/td> 2394K
代理商: UPD78053GC-XXX-8BT
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)當(dāng)前第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)
19
5.3.3
Table indirect addressing .....................................................................................................
120
5.3.4
Register addressing .............................................................................................................
120
5.4
Operand Address Addressing .........................................................................................
121
5.4.1
Implied addressing ..............................................................................................................
121
5.4.2
Register addressing .............................................................................................................
122
5.4.3
Direct addressing .................................................................................................................
123
5.4.4
Short direct addressing ........................................................................................................
124
5.4.5
Special-Function Register (SFR) addressing ......................................................................
125
5.4.6
Register indirect addressing ................................................................................................
126
5.4.7
Based addressing ................................................................................................................
127
5.4.8
Based indexed addressing ..................................................................................................
128
5.4.9
Stack addressing .................................................................................................................
128
CHAPTER 6
PORT FUNCTIONS ....................................................................................................
129
6.1
Port Functions ...................................................................................................................
129
6.2
Port Configuration ............................................................................................................
134
6.2.1
Port 0 ...................................................................................................................................
134
6.2.2
Port 1 ...................................................................................................................................
136
6.2.3
Port 2 (
PD78054 Subseries) ..............................................................................................
137
6.2.4
Port 2 (
PD78054Y Subseries) ...........................................................................................
139
6.2.5
Port 3 ...................................................................................................................................
141
6.2.6
Port 4 ...................................................................................................................................
142
6.2.7
Port 5 ...................................................................................................................................
143
6.2.8
Port 6 ...................................................................................................................................
144
6.2.9
Port 7 ...................................................................................................................................
146
6.2.10
Port 12 .................................................................................................................................
148
6.2.11
Port 13 .................................................................................................................................
149
6.3
Port Function Control Registers .....................................................................................
150
6.4
Port Function Operations .................................................................................................
156
6.4.1
Writing to input/output port ...................................................................................................
156
6.4.2
Reading from input/output port ............................................................................................
156
6.4.3
Operations on input/output port ...........................................................................................
157
6.5
Selection of Mask Option .................................................................................................
157
CHAPTER 7
CLOCK GENERATOR ................................................................................................
159
7.1
Clock Generator Functions ..............................................................................................
159
7.2
Clock Generator Configuration .......................................................................................
159
7.3
Clock Generator Control Register ...................................................................................
161
7.4
System Clock Oscillator ...................................................................................................
165
7.4.1
Main system clock oscillator ................................................................................................
165
7.4.2
Subsystem clock oscillator ..................................................................................................
166
7.4.3
Scaler ...................................................................................................................................
168
7.4.4
When no subsystem clocks are used ..................................................................................
168
7.5
Clock Generator Operations ............................................................................................
169
7.5.1
Main system clock operations .............................................................................................
170
7.5.2
Subsystem clock operations ................................................................................................
171
7.6
Changing System Clock and CPU Clock Settings .........................................................
171
7.6.1
Time required for switchover between system clock and CPU clock ..................................
171
7.6.2
System clock and CPU clock switching procedure ..............................................................
173
相關(guān)PDF資料
PDF描述
UPD78322GJ-XXX-5BJ 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP74
UPD789132GS-XXX 8-BIT, MROM, MICROCONTROLLER, PDSO30
UPD789122UC-XXX-5A4 8-BIT, MROM, MICROCONTROLLER, PDSO30
UPL4-NM-150 INTERCONNECTION DEVICE
USB-AM-S-F-W-SM1-TR 4 CONTACT(S), FEMALE, RIGHT ANGLE TELECOM AND DATACOM CONNECTOR, SURFACE MOUNT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD78063GF-144-3BA 制造商:World Products 功能描述:
UPD78063GF-147-3BA 制造商:Renesas Electronics Corporation 功能描述:
UPD78063GF-169-3BA 制造商:Renesas Electronics Corporation 功能描述:
UPD78064GF-132-3BA 制造商:Renesas Electronics Corporation 功能描述:
UPD78070AGF-3BA-A 制造商:Renesas Electronics Corporation 功能描述:MCU 8-bit 78K 78K0 CISC ROMLess 3.3V/5V 100-Pin PQFP