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19
5.3.3
Table indirect addressing .....................................................................................................
120
5.3.4
Register addressing .............................................................................................................
120
5.4
Operand Address Addressing .........................................................................................
121
5.4.1
Implied addressing ..............................................................................................................
121
5.4.2
Register addressing .............................................................................................................
122
5.4.3
Direct addressing .................................................................................................................
123
5.4.4
Short direct addressing ........................................................................................................
124
5.4.5
Special-Function Register (SFR) addressing ......................................................................
125
5.4.6
Register indirect addressing ................................................................................................
126
5.4.7
Based addressing ................................................................................................................
127
5.4.8
Based indexed addressing ..................................................................................................
128
5.4.9
Stack addressing .................................................................................................................
128
CHAPTER 6
PORT FUNCTIONS ....................................................................................................
129
6.1
Port Functions ...................................................................................................................
129
6.2
Port Configuration ............................................................................................................
134
6.2.1
Port 0 ...................................................................................................................................
134
6.2.2
Port 1 ...................................................................................................................................
136
6.2.3
Port 2 (
PD78054 Subseries) ..............................................................................................
137
6.2.4
Port 2 (
PD78054Y Subseries) ...........................................................................................
139
6.2.5
Port 3 ...................................................................................................................................
141
6.2.6
Port 4 ...................................................................................................................................
142
6.2.7
Port 5 ...................................................................................................................................
143
6.2.8
Port 6 ...................................................................................................................................
144
6.2.9
Port 7 ...................................................................................................................................
146
6.2.10
Port 12 .................................................................................................................................
148
6.2.11
Port 13 .................................................................................................................................
149
6.3
Port Function Control Registers .....................................................................................
150
6.4
Port Function Operations .................................................................................................
156
6.4.1
Writing to input/output port ...................................................................................................
156
6.4.2
Reading from input/output port ............................................................................................
156
6.4.3
Operations on input/output port ...........................................................................................
157
6.5
Selection of Mask Option .................................................................................................
157
CHAPTER 7
CLOCK GENERATOR ................................................................................................
159
7.1
Clock Generator Functions ..............................................................................................
159
7.2
Clock Generator Configuration .......................................................................................
159
7.3
Clock Generator Control Register ...................................................................................
161
7.4
System Clock Oscillator ...................................................................................................
165
7.4.1
Main system clock oscillator ................................................................................................
165
7.4.2
Subsystem clock oscillator ..................................................................................................
166
7.4.3
Scaler ...................................................................................................................................
168
7.4.4
When no subsystem clocks are used ..................................................................................
168
7.5
Clock Generator Operations ............................................................................................
169
7.5.1
Main system clock operations .............................................................................................
170
7.5.2
Subsystem clock operations ................................................................................................
171
7.6
Changing System Clock and CPU Clock Settings .........................................................
171
7.6.1
Time required for switchover between system clock and CPU clock ..................................
171
7.6.2
System clock and CPU clock switching procedure ..............................................................
173