
35
μ
PD78044H, 78045H, 78046H
The following total power consumption calculation example assumes the case where the characters shown in the
figure on the next page are displayed.
Example:
The operating conditions are as follows:
V
DD
= 5 V
±
10 %, operating at 5.0 MHz
Supply current (I
DD
) = 21.6 mA
Display outputs: 11 grids
×
10 segments (cut width is 1/16)
It is assumed that up to 15 mA flows to each grid pin, and that up to 3 mA flows to each segment pin.
It is also assumed that all display outputs are turned off at key scan timings.
Display output voltage: grid
V
O3
= V
DD
– 2 V (Voltage drop of 2 V is assumed.)
segment
V
O3
= V
DD
– 0.4 V (Voltage drop of 0.4 V is assumed.)
Voltage applied to fluorescent indication panel (V
LOAD
) = –30 V
Mask-option pull-down resistor = 25 k
The total power loss is calculated by determining power consumption
1
to
3
under the above
conditions.
1
Power consumption of CPU: 5.5 V
×
21.6 mA = 118.8 mW
2
Power consumption at output pins:
total current for all grids
Grid:
(V
DD
– V
O3
)
×
×
digit width (1 – cut width) =
number of grids + 1
15 mA
×
11 grids
2 V
×
×
(1 – 1/16) = 25.8 mW
11 grids + 1
total segment current for all dots to be lit
Segment: (V
DD
– V
O3
)
×
=
number of grids + 1
3 mA
×
31 dots
11 grids + 1
0.4 V
×
= 3.1 mW
3
Power consumption at pull-down resistors:
Grid:
(V
O3
– V
LOAD
)
2
×
×
digit width =
pull-down resistance
number of grids + 1
(5.5 V – 2 V – (–30 V))
2
11 grids
×
×
(1 – 1/16) = 38.6 mW
25 k
11 grids + 1
(V
O3
– V
LOAD
)
2
number of dots to be lit
×
=
pull-down resistance
number of grids + 1
(5.5 V – 0.4 V – (–30 V))
2
31 dots
×
= 127.3 mW
25 k
11 grids + 1
number of grids
Segment:
Total power consumption =
1
+
2
+
3
= 118.8 + 25.8 + 3.1 + 38.6 + 127.3 = 313.6 mW
In this example, the total power consumption does not exceed the rated value for the permissible total power loss
shown in the graph on the previous page. Therefore, the calculation result in this example (313.6 mW) satisfies the
requirement. If the total power consumption exceeds the rated value for the permissible total power loss, the power
consumption must be reduced, by reducing the number of built-in pull-down resistors.