參數(shù)資料
型號(hào)： UPD780338
廠商： NEC Corp.
元件分類： 8位微控制器
英文描述： 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述： 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁(yè)數(shù)： 25/66頁(yè)
文件大小： 565K
代理商： UPD780338
μ
PD78F0034A, 78F0034AY
25
Data Sheet U14040EJ4V0DS
Capacitance (T
A
= 25
°
C, V
DD
= V
SS
= 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input
capacitance
C
IN
f = 1 MHz
Unmeasured pins returned to 0 V.
15
pF
I/O
capacitance
C
IO
f = 1 MHz
Unmeasured pins
returned to 0 V.
P00 to P03, P20 to P25,
P34 to P36, P40 to P47,
P50 to P57, P64 to P67,
P70 to P75,
15
pF
P30 to P33
20
pF
Remark
Unless otherwise specified, the characteristics of alternate-function pins are the same as those of port
pins.
Main System Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Resonator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
resonator
Oscillation
frequency (f
X
)
Note 1
V
DD
= 4.0 to 5.5 V
1.0
8.38
MHz
V
DD
= 1.8 to 5.5 V
1.0
5.0
Oscillation
stabilization time
Note 2
After V
DD
reaches oscil-
lation voltage range MIN.
4
ms
Crystal
resonator
Oscillation
frequency (f
X
)
Note 1
V
DD
= 4.0 to 5.5 V
1.0
8.38
MHz
V
DD
= 1.8 to 5.5 V
1.0
5.0
Oscillation
stabilization time
Note 2
V
DD
= 4.0 to 5.5 V
10
ms
V
DD
= 1.8 to 5.5 V
30
External
clock
X1 input
frequency (f
X
)
Note 1
V
DD
= 4.0 to 5.5 V
1.0
8.38
MHz
V
DD
= 1.8 to 5.5 V
1.0
5.0
X1 input high-/low-level
width (t
XH
, t
XL
)
V
DD
= 4.0 to 5.5 V
50
500
ns
V
DD
= 1.8 to 5.5 V
85
500
Notes 1.
Indicates only oscillator characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after reset or STOP mode release.
Cautions 1. When using the main system clock oscillator, wire as follows in the area enclosed by the
broken lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor to the same potential as V
SS1
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. When the main system clock is stopped and the system is operating on the subsystem clock,
wait until the oscillation stabilization time has been secured by the program before switching
back to the main system clock.
X2
V
PP
X1
C1
C2
X2
X1
PD74HCU04
μ
X2
V
PP
X1
C1
C2
R1
相關(guān)PDF資料
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